.cpu ep9312
	.fpu maverick
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 18, 4
	.file	"cfsh64.c"
	.global	left
	.data
	.align	3
	.type	left, %object
	.size	left, 520
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	.text
	.align	2
	.global	main
	.type	main, %function
main:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	mov	ip, sp
	stmfd	sp!, {fp, ip, lr, pc}
	sub	fp, ip, #4
	adr	r0, .L3
	ldmia	r0, {r0-r1}
	bl	uitest
	adr	r0, .L3
	ldmia	r0, {r0-r1}
	bl	itest
	mov	r0, #0
	bl	exit
.L4:
	.align	3
.L3:
	.word	19088743
	.word	-559042351
	.size	main, .-main
	.section	.rodata
	.align	2
.LC0:
	.ascii	"ASL failed at %02d: 0x%016llx 0x%016llx\012\000"
	.align	2
.LC1:
	.ascii	"LSR failed at %02d: 0x%016llx 0x%016llx\012\000"
	.text
	.align	2
	.global	uitest
	.type	uitest, %function
uitest:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 2144
	@ frame_needed = 1, uses_anonymous_args = 0
	mov	ip, sp
	stmfd	sp!, {r4, r5, r6, fp, ip, lr, pc}
	cfstrd	mvd8, [sp, #-8]!
	sub	fp, ip, #4
	sub	sp, sp, #2144
	sub	sp, sp, #12
	str	r0, [fp, #-52]
	str	r1, [fp, #-48]
	mvn	r0, #0
	str	r0, [fp, #-56]
	ldr	r3, .L398
	str	r3, [fp, #-40]
	cfldr64	mvdx8, [fp, #-52]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2176
	cfstr64	mvdx0, [r0, #4]
	sub	r1, fp, #2160
	cfstr64	mvdx8, [r1, #-4]
	ldr	r2, [fp, #-2172]
	ldr	r3, [fp, #-2164]
	cmp	r2, r3
	bne	.L267
	ldr	r4, [fp, #-2168]
	ldr	r0, [fp, #-2160]
	cmp	r4, r0
	beq	.L6
.L267:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L6:
	cfsh64	mvdx0, mvdx8, #0
	cfadd64	mvdx0, mvdx0, mvdx0
	sub	r1, fp, #2160
	cfstr64	mvdx0, [r1, #4]
	ldr	r2, [fp, #-56]
	add	r2, r2, #1
	str	r2, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2144
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2156]
	ldr	r2, [fp, #-2148]
	cmp	r1, r2
	bne	.L268
	ldr	r3, [fp, #-2152]
	ldr	r4, [fp, #-2144]
	cmp	r3, r4
	beq	.L8
.L268:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfsh64	mvdx0, mvdx8, #0
	cfadd64	mvdx0, mvdx0, mvdx0
	cfmvr64l	r3, mvdx0
	cfmvr64h	r4, mvdx0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L8:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #2
	sub	r0, fp, #2144
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2128
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2140]
	ldr	r2, [fp, #-2132]
	cmp	r1, r2
	bne	.L269
	ldr	r3, [fp, #-2136]
	ldr	r4, [fp, #-2128]
	cmp	r3, r4
	beq	.L10
.L269:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #2
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L10:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #3
	sub	r0, fp, #2128
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2112
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2124]
	ldr	r2, [fp, #-2116]
	cmp	r1, r2
	bne	.L270
	ldr	r3, [fp, #-2120]
	ldr	r4, [fp, #-2112]
	cmp	r3, r4
	beq	.L12
.L270:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #3
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L12:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #4
	sub	r0, fp, #2112
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2096
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2108]
	ldr	r2, [fp, #-2100]
	cmp	r1, r2
	bne	.L271
	ldr	r3, [fp, #-2104]
	ldr	r4, [fp, #-2096]
	cmp	r3, r4
	beq	.L14
.L271:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #4
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L14:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #5
	sub	r0, fp, #2096
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2080
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2092]
	ldr	r2, [fp, #-2084]
	cmp	r1, r2
	bne	.L272
	ldr	r3, [fp, #-2088]
	ldr	r4, [fp, #-2080]
	cmp	r3, r4
	beq	.L16
.L272:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #5
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L16:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #6
	sub	r0, fp, #2080
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2064
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2076]
	ldr	r2, [fp, #-2068]
	cmp	r1, r2
	bne	.L273
	ldr	r3, [fp, #-2072]
	ldr	r4, [fp, #-2064]
	cmp	r3, r4
	beq	.L18
.L273:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #6
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L18:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #7
	sub	r0, fp, #2064
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2048
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2060]
	ldr	r2, [fp, #-2052]
	cmp	r1, r2
	bne	.L274
	ldr	r3, [fp, #-2056]
	ldr	r4, [fp, #-2048]
	cmp	r3, r4
	beq	.L20
.L274:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #7
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L20:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #8
	sub	r0, fp, #2048
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2032
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2044]
	ldr	r2, [fp, #-2036]
	cmp	r1, r2
	bne	.L275
	ldr	r3, [fp, #-2040]
	ldr	r4, [fp, #-2032]
	cmp	r3, r4
	beq	.L22
.L275:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #8
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L22:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #9
	sub	r0, fp, #2032
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2016
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2028]
	ldr	r2, [fp, #-2020]
	cmp	r1, r2
	bne	.L276
	ldr	r3, [fp, #-2024]
	ldr	r4, [fp, #-2016]
	cmp	r3, r4
	beq	.L24
.L276:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #9
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L24:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #10
	sub	r0, fp, #2016
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #2000
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-2012]
	ldr	r2, [fp, #-2004]
	cmp	r1, r2
	bne	.L277
	ldr	r3, [fp, #-2008]
	ldr	r4, [fp, #-2000]
	cmp	r3, r4
	beq	.L26
.L277:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #10
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L26:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #11
	sub	r0, fp, #2000
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1984
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1996]
	ldr	r2, [fp, #-1988]
	cmp	r1, r2
	bne	.L278
	ldr	r3, [fp, #-1992]
	ldr	r4, [fp, #-1984]
	cmp	r3, r4
	beq	.L28
.L278:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #11
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L28:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #12
	sub	r0, fp, #1984
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1968
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1980]
	ldr	r2, [fp, #-1972]
	cmp	r1, r2
	bne	.L279
	ldr	r3, [fp, #-1976]
	ldr	r4, [fp, #-1968]
	cmp	r3, r4
	beq	.L30
.L279:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #12
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L30:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #13
	sub	r0, fp, #1968
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1952
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1964]
	ldr	r2, [fp, #-1956]
	cmp	r1, r2
	bne	.L280
	ldr	r3, [fp, #-1960]
	ldr	r4, [fp, #-1952]
	cmp	r3, r4
	beq	.L32
.L280:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #13
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L32:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #14
	sub	r0, fp, #1952
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1936
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1948]
	ldr	r2, [fp, #-1940]
	cmp	r1, r2
	bne	.L281
	ldr	r3, [fp, #-1944]
	ldr	r4, [fp, #-1936]
	cmp	r3, r4
	beq	.L34
.L281:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #14
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L34:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #15
	sub	r0, fp, #1936
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1920
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1932]
	ldr	r2, [fp, #-1924]
	cmp	r1, r2
	bne	.L282
	ldr	r3, [fp, #-1928]
	ldr	r4, [fp, #-1920]
	cmp	r3, r4
	beq	.L36
.L282:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #15
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L36:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #16
	sub	r0, fp, #1920
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1904
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1916]
	ldr	r2, [fp, #-1908]
	cmp	r1, r2
	bne	.L283
	ldr	r3, [fp, #-1912]
	ldr	r4, [fp, #-1904]
	cmp	r3, r4
	beq	.L38
.L283:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #16
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L38:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #17
	sub	r0, fp, #1904
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1888
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1900]
	ldr	r2, [fp, #-1892]
	cmp	r1, r2
	bne	.L284
	ldr	r3, [fp, #-1896]
	ldr	r4, [fp, #-1888]
	cmp	r3, r4
	beq	.L40
.L284:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #17
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L40:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #18
	sub	r0, fp, #1888
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1872
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1884]
	ldr	r2, [fp, #-1876]
	cmp	r1, r2
	bne	.L285
	ldr	r3, [fp, #-1880]
	ldr	r4, [fp, #-1872]
	cmp	r3, r4
	beq	.L42
.L285:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #18
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L42:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #19
	sub	r0, fp, #1872
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1856
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1868]
	ldr	r2, [fp, #-1860]
	cmp	r1, r2
	bne	.L286
	ldr	r3, [fp, #-1864]
	ldr	r4, [fp, #-1856]
	cmp	r3, r4
	beq	.L44
.L286:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #19
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L44:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #20
	sub	r0, fp, #1856
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1840
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1852]
	ldr	r2, [fp, #-1844]
	cmp	r1, r2
	bne	.L287
	ldr	r3, [fp, #-1848]
	ldr	r4, [fp, #-1840]
	cmp	r3, r4
	beq	.L46
.L287:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #20
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L46:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #21
	sub	r0, fp, #1840
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1824
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1836]
	ldr	r2, [fp, #-1828]
	cmp	r1, r2
	bne	.L288
	ldr	r3, [fp, #-1832]
	ldr	r4, [fp, #-1824]
	cmp	r3, r4
	beq	.L48
.L288:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #21
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L48:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #22
	sub	r0, fp, #1824
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1808
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1820]
	ldr	r2, [fp, #-1812]
	cmp	r1, r2
	bne	.L289
	ldr	r3, [fp, #-1816]
	ldr	r4, [fp, #-1808]
	cmp	r3, r4
	beq	.L50
.L289:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #22
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L50:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #23
	sub	r0, fp, #1808
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1792
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1804]
	ldr	r2, [fp, #-1796]
	cmp	r1, r2
	bne	.L290
	ldr	r3, [fp, #-1800]
	ldr	r4, [fp, #-1792]
	cmp	r3, r4
	beq	.L52
.L290:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #23
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L52:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #24
	sub	r0, fp, #1792
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1776
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1788]
	ldr	r2, [fp, #-1780]
	cmp	r1, r2
	bne	.L291
	ldr	r3, [fp, #-1784]
	ldr	r4, [fp, #-1776]
	cmp	r3, r4
	beq	.L54
.L291:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #24
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L54:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #25
	sub	r0, fp, #1776
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1760
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1772]
	ldr	r2, [fp, #-1764]
	cmp	r1, r2
	bne	.L292
	ldr	r3, [fp, #-1768]
	ldr	r4, [fp, #-1760]
	cmp	r3, r4
	beq	.L56
.L292:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #25
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L56:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #26
	sub	r0, fp, #1760
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1744
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1756]
	ldr	r2, [fp, #-1748]
	cmp	r1, r2
	bne	.L293
	ldr	r3, [fp, #-1752]
	ldr	r4, [fp, #-1744]
	cmp	r3, r4
	beq	.L58
.L293:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #26
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L58:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #27
	sub	r0, fp, #1744
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1728
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1740]
	ldr	r2, [fp, #-1732]
	cmp	r1, r2
	bne	.L294
	ldr	r3, [fp, #-1736]
	ldr	r4, [fp, #-1728]
	cmp	r3, r4
	beq	.L60
.L294:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #27
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L60:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #28
	sub	r0, fp, #1728
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	b	.L399
.L400:
	.align	2
.L398:
	.word	.LC0
	.word	left
.L399:
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1712
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1724]
	ldr	r2, [fp, #-1716]
	cmp	r1, r2
	bne	.L295
	ldr	r3, [fp, #-1720]
	ldr	r4, [fp, #-1712]
	cmp	r3, r4
	beq	.L62
.L295:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #28
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L62:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #29
	sub	r0, fp, #1712
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1696
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1708]
	ldr	r2, [fp, #-1700]
	cmp	r1, r2
	bne	.L296
	ldr	r3, [fp, #-1704]
	ldr	r4, [fp, #-1696]
	cmp	r3, r4
	beq	.L64
.L296:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #29
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L64:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #30
	sub	r0, fp, #1696
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1680
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1692]
	ldr	r2, [fp, #-1684]
	cmp	r1, r2
	bne	.L297
	ldr	r3, [fp, #-1688]
	ldr	r4, [fp, #-1680]
	cmp	r3, r4
	beq	.L66
.L297:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #30
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L66:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #31
	sub	r0, fp, #1680
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1664
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1676]
	ldr	r2, [fp, #-1668]
	cmp	r1, r2
	bne	.L298
	ldr	r3, [fp, #-1672]
	ldr	r4, [fp, #-1664]
	cmp	r3, r4
	beq	.L68
.L298:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #31
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L68:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #32
	sub	r0, fp, #1664
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1648
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1660]
	ldr	r2, [fp, #-1652]
	cmp	r1, r2
	bne	.L299
	ldr	r3, [fp, #-1656]
	ldr	r4, [fp, #-1648]
	cmp	r3, r4
	beq	.L70
.L299:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #32
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L70:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #33
	sub	r0, fp, #1648
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1632
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1644]
	ldr	r2, [fp, #-1636]
	cmp	r1, r2
	bne	.L300
	ldr	r3, [fp, #-1640]
	ldr	r4, [fp, #-1632]
	cmp	r3, r4
	beq	.L72
.L300:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #33
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L72:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #34
	sub	r0, fp, #1632
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1616
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1628]
	ldr	r2, [fp, #-1620]
	cmp	r1, r2
	bne	.L301
	ldr	r3, [fp, #-1624]
	ldr	r4, [fp, #-1616]
	cmp	r3, r4
	beq	.L74
.L301:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #34
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L74:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #35
	sub	r0, fp, #1616
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1600
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1612]
	ldr	r2, [fp, #-1604]
	cmp	r1, r2
	bne	.L302
	ldr	r3, [fp, #-1608]
	ldr	r4, [fp, #-1600]
	cmp	r3, r4
	beq	.L76
.L302:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #35
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L76:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #36
	sub	r0, fp, #1600
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1584
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1596]
	ldr	r2, [fp, #-1588]
	cmp	r1, r2
	bne	.L303
	ldr	r3, [fp, #-1592]
	ldr	r4, [fp, #-1584]
	cmp	r3, r4
	beq	.L78
.L303:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #36
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L78:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #37
	sub	r0, fp, #1584
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1568
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1580]
	ldr	r2, [fp, #-1572]
	cmp	r1, r2
	bne	.L304
	ldr	r3, [fp, #-1576]
	ldr	r4, [fp, #-1568]
	cmp	r3, r4
	beq	.L80
.L304:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #37
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L80:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #38
	sub	r0, fp, #1568
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1552
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1564]
	ldr	r2, [fp, #-1556]
	cmp	r1, r2
	bne	.L305
	ldr	r3, [fp, #-1560]
	ldr	r4, [fp, #-1552]
	cmp	r3, r4
	beq	.L82
.L305:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #38
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L82:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #39
	sub	r0, fp, #1552
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1536
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1548]
	ldr	r2, [fp, #-1540]
	cmp	r1, r2
	bne	.L306
	ldr	r3, [fp, #-1544]
	ldr	r4, [fp, #-1536]
	cmp	r3, r4
	beq	.L84
.L306:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #39
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L84:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #40
	sub	r0, fp, #1536
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1520
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1532]
	ldr	r2, [fp, #-1524]
	cmp	r1, r2
	bne	.L307
	ldr	r3, [fp, #-1528]
	ldr	r4, [fp, #-1520]
	cmp	r3, r4
	beq	.L86
.L307:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #40
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L86:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #41
	sub	r0, fp, #1520
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1504
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1516]
	ldr	r2, [fp, #-1508]
	cmp	r1, r2
	bne	.L308
	ldr	r3, [fp, #-1512]
	ldr	r4, [fp, #-1504]
	cmp	r3, r4
	beq	.L88
.L308:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #41
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L88:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #42
	sub	r0, fp, #1504
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1488
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1500]
	ldr	r2, [fp, #-1492]
	cmp	r1, r2
	bne	.L309
	ldr	r3, [fp, #-1496]
	ldr	r4, [fp, #-1488]
	cmp	r3, r4
	beq	.L90
.L309:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #42
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L90:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #43
	sub	r0, fp, #1488
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1472
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1484]
	ldr	r2, [fp, #-1476]
	cmp	r1, r2
	bne	.L310
	ldr	r3, [fp, #-1480]
	ldr	r4, [fp, #-1472]
	cmp	r3, r4
	beq	.L92
.L310:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #43
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L92:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #44
	sub	r0, fp, #1472
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1456
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1468]
	ldr	r2, [fp, #-1460]
	cmp	r1, r2
	bne	.L311
	ldr	r3, [fp, #-1464]
	ldr	r4, [fp, #-1456]
	cmp	r3, r4
	beq	.L94
.L311:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #44
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L94:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #45
	sub	r0, fp, #1456
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1440
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1452]
	ldr	r2, [fp, #-1444]
	cmp	r1, r2
	bne	.L312
	ldr	r3, [fp, #-1448]
	ldr	r4, [fp, #-1440]
	cmp	r3, r4
	beq	.L96
.L312:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #45
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L96:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #46
	sub	r0, fp, #1440
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1424
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1436]
	ldr	r2, [fp, #-1428]
	cmp	r1, r2
	bne	.L313
	ldr	r3, [fp, #-1432]
	ldr	r4, [fp, #-1424]
	cmp	r3, r4
	beq	.L98
.L313:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #46
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L98:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #47
	sub	r0, fp, #1424
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1408
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1420]
	ldr	r2, [fp, #-1412]
	cmp	r1, r2
	bne	.L314
	ldr	r3, [fp, #-1416]
	ldr	r4, [fp, #-1408]
	cmp	r3, r4
	beq	.L100
.L314:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #47
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L100:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #48
	sub	r0, fp, #1408
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1392
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1404]
	ldr	r2, [fp, #-1396]
	cmp	r1, r2
	bne	.L315
	ldr	r3, [fp, #-1400]
	ldr	r4, [fp, #-1392]
	cmp	r3, r4
	beq	.L102
.L315:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #48
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L102:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #49
	sub	r0, fp, #1392
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1376
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1388]
	ldr	r2, [fp, #-1380]
	cmp	r1, r2
	bne	.L316
	ldr	r3, [fp, #-1384]
	ldr	r4, [fp, #-1376]
	cmp	r3, r4
	beq	.L104
.L316:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #49
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L104:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #50
	sub	r0, fp, #1376
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1360
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1372]
	ldr	r2, [fp, #-1364]
	cmp	r1, r2
	bne	.L317
	ldr	r3, [fp, #-1368]
	ldr	r4, [fp, #-1360]
	cmp	r3, r4
	beq	.L106
.L317:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #50
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L106:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #51
	sub	r0, fp, #1360
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1344
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1356]
	ldr	r2, [fp, #-1348]
	cmp	r1, r2
	bne	.L318
	ldr	r3, [fp, #-1352]
	ldr	r4, [fp, #-1344]
	cmp	r3, r4
	beq	.L108
.L318:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #51
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L108:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #52
	sub	r0, fp, #1344
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1328
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1340]
	ldr	r2, [fp, #-1332]
	cmp	r1, r2
	bne	.L319
	ldr	r3, [fp, #-1336]
	ldr	r4, [fp, #-1328]
	cmp	r3, r4
	beq	.L110
.L319:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #52
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L110:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #53
	sub	r0, fp, #1328
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1312
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1324]
	ldr	r2, [fp, #-1316]
	cmp	r1, r2
	bne	.L320
	ldr	r3, [fp, #-1320]
	ldr	r4, [fp, #-1312]
	cmp	r3, r4
	beq	.L112
.L320:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #53
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L112:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #54
	sub	r0, fp, #1312
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1296
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1308]
	ldr	r2, [fp, #-1300]
	cmp	r1, r2
	bne	.L321
	ldr	r3, [fp, #-1304]
	ldr	r4, [fp, #-1296]
	cmp	r3, r4
	beq	.L114
.L321:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #54
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L114:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #55
	sub	r0, fp, #1296
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1280
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1292]
	ldr	r2, [fp, #-1284]
	cmp	r1, r2
	bne	.L322
	ldr	r3, [fp, #-1288]
	ldr	r4, [fp, #-1280]
	cmp	r3, r4
	beq	.L116
.L322:
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #55
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L116:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #56
	sub	r0, fp, #1280
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L398+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1264
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1276]
	ldr	r2, [fp, #-1268]
	cmp	r1, r2
	bne	.L323
	ldr	r3, [fp, #-1272]
	ldr	r4, [fp, #-1264]
	cmp	r3, r4
	beq	.L118
.L323:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #56
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L118:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #57
	sub	r0, fp, #1264
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1248
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1260]
	ldr	r2, [fp, #-1252]
	cmp	r1, r2
	bne	.L324
	ldr	r3, [fp, #-1256]
	ldr	r4, [fp, #-1248]
	cmp	r3, r4
	beq	.L120
.L324:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #57
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L120:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #58
	sub	r0, fp, #1248
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1232
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1244]
	ldr	r2, [fp, #-1236]
	cmp	r1, r2
	bne	.L325
	ldr	r3, [fp, #-1240]
	ldr	r4, [fp, #-1232]
	cmp	r3, r4
	beq	.L122
.L325:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #58
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L122:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #59
	sub	r0, fp, #1232
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1216
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1228]
	ldr	r2, [fp, #-1220]
	cmp	r1, r2
	bne	.L326
	ldr	r3, [fp, #-1224]
	ldr	r4, [fp, #-1216]
	cmp	r3, r4
	beq	.L124
.L326:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #59
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L124:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #60
	sub	r0, fp, #1216
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1200
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1212]
	ldr	r2, [fp, #-1204]
	cmp	r1, r2
	bne	.L327
	ldr	r3, [fp, #-1208]
	ldr	r4, [fp, #-1200]
	cmp	r3, r4
	beq	.L126
.L327:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #60
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L126:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #61
	sub	r0, fp, #1200
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1184
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1196]
	ldr	r2, [fp, #-1188]
	cmp	r1, r2
	bne	.L328
	ldr	r3, [fp, #-1192]
	ldr	r4, [fp, #-1184]
	cmp	r3, r4
	beq	.L128
.L328:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #61
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L128:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #62
	sub	r0, fp, #1184
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1168
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1180]
	ldr	r2, [fp, #-1172]
	cmp	r1, r2
	bne	.L329
	ldr	r3, [fp, #-1176]
	ldr	r4, [fp, #-1168]
	cmp	r3, r4
	beq	.L130
.L329:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #62
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L130:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #63
	sub	r0, fp, #1168
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1152
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1164]
	ldr	r2, [fp, #-1156]
	cmp	r1, r2
	bne	.L330
	ldr	r3, [fp, #-1160]
	ldr	r4, [fp, #-1152]
	cmp	r3, r4
	beq	.L132
.L330:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #63
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L132:
	sub	r0, fp, #1152
	cfstr64	mvdx8, [r0, #4]
	mov	r1, #0
	str	r1, [fp, #-1136]
	mov	r2, #0
	str	r2, [fp, #-1140]
	sub	r0, fp, #1136
	cfldr64	mvdx0, [r0, #-4]
	sub	r0, fp, #1136
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1136
	cfstr64	mvdx0, [r0, #4]
	ldr	r1, [fp, #-1140]
	ldr	r2, [fp, #-1132]
	cmp	r1, r2
	bne	.L331
	ldr	r3, [fp, #-1136]
	ldr	r4, [fp, #-1128]
	cmp	r3, r4
	beq	.L134
.L331:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	sub	r0, fp, #1120
	cfstr64	mvdx8, [r0, #-4]
	mov	r4, #0
	mov	r3, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L134:
	mvn	r1, #0
	str	r1, [fp, #-56]
	ldr	r3, .L401+4
	str	r3, [fp, #-40]
	ldr	r2, [fp, #-56]
	add	r2, r2, #1
	str	r2, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1120
	cfstr64	mvdx0, [r0, #4]
	sub	r1, fp, #1104
	cfstr64	mvdx8, [r1, #-4]
	ldr	r2, [fp, #-1116]
	ldr	r3, [fp, #-1108]
	cmp	r2, r3
	bne	.L332
	ldr	r4, [fp, #-1112]
	ldr	r0, [fp, #-1104]
	cmp	r4, r0
	beq	.L136
.L332:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L136:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	movs	r2, r4, lsr #1
	mov	r1, r3, rrx
	sub	r0, fp, #1104
	stmib	r0, {r1-r2}
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1088
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1100]
	ldr	r2, [fp, #-1092]
	cmp	r1, r2
	bne	.L333
	ldr	r3, [fp, #-1096]
	ldr	r4, [fp, #-1088]
	cmp	r3, r4
	beq	.L138
.L333:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	movs	r4, r4, lsr #1
	mov	r3, r3, rrx
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L138:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #30
	mov	r0, r3, lsr #2
	str	r0, [fp, #-1084]
	ldr	r1, [fp, #-1084]
	orr	r2, r2, r1
	str	r2, [fp, #-1084]
	mov	r2, r4, lsr #2
	str	r2, [fp, #-1080]
	sub	r0, fp, #1088
	cfldr64	mvdx0, [r0, #4]
	sub	r0, fp, #1088
	cfstr64	mvdx0, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1072
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1084]
	ldr	r2, [fp, #-1076]
	cmp	r1, r2
	bne	.L334
	ldr	r3, [fp, #-1080]
	ldr	r4, [fp, #-1072]
	cmp	r3, r4
	beq	.L140
.L334:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #30
	mov	r3, r1, lsr #2
	orr	r3, r0, r3
	mov	r4, r2, lsr #2
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L140:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #29
	mov	r0, r3, lsr #3
	str	r0, [fp, #-1068]
	ldr	r1, [fp, #-1068]
	orr	r2, r2, r1
	str	r2, [fp, #-1068]
	mov	r2, r4, lsr #3
	str	r2, [fp, #-1064]
	sub	r0, fp, #1072
	cfldr64	mvdx0, [r0, #4]
	sub	r0, fp, #1072
	cfstr64	mvdx0, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1056
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1068]
	ldr	r2, [fp, #-1060]
	cmp	r1, r2
	bne	.L335
	ldr	r3, [fp, #-1064]
	ldr	r4, [fp, #-1056]
	cmp	r3, r4
	beq	.L142
.L335:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #29
	mov	r3, r1, lsr #3
	orr	r3, r0, r3
	mov	r4, r2, lsr #3
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L142:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #28
	mov	r0, r3, lsr #4
	str	r0, [fp, #-1052]
	ldr	r1, [fp, #-1052]
	orr	r2, r2, r1
	str	r2, [fp, #-1052]
	mov	r2, r4, lsr #4
	str	r2, [fp, #-1048]
	sub	r0, fp, #1056
	cfldr64	mvdx0, [r0, #4]
	sub	r0, fp, #1056
	cfstr64	mvdx0, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1040
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1052]
	ldr	r2, [fp, #-1044]
	cmp	r1, r2
	bne	.L336
	ldr	r3, [fp, #-1048]
	ldr	r4, [fp, #-1040]
	cmp	r3, r4
	beq	.L144
.L336:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #28
	mov	r3, r1, lsr #4
	orr	r3, r0, r3
	mov	r4, r2, lsr #4
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L144:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #27
	mov	r0, r3, lsr #5
	str	r0, [fp, #-1036]
	ldr	r1, [fp, #-1036]
	orr	r2, r2, r1
	str	r2, [fp, #-1036]
	mov	r2, r4, lsr #5
	str	r2, [fp, #-1032]
	sub	r0, fp, #1040
	cfldr64	mvdx0, [r0, #4]
	sub	r0, fp, #1040
	cfstr64	mvdx0, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1024
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1036]
	ldr	r2, [fp, #-1028]
	cmp	r1, r2
	bne	.L337
	ldr	r3, [fp, #-1032]
	ldr	r4, [fp, #-1024]
	cmp	r3, r4
	beq	.L146
.L337:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #27
	mov	r3, r1, lsr #5
	orr	r3, r0, r3
	mov	r4, r2, lsr #5
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L146:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #26
	mov	r0, r3, lsr #6
	str	r0, [fp, #-1020]
	ldr	r1, [fp, #-1020]
	orr	r1, r2, r1
	str	r1, [fp, #-1020]
	mov	r2, r4, lsr #6
	str	r2, [fp, #-1016]
	sub	r3, fp, #1020
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-1020]
	str	r4, [fp, #-1016]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-1012]
	str	r1, [fp, #-1008]
	ldr	r1, [fp, #-1020]
	ldr	r2, [fp, #-1012]
	cmp	r1, r2
	bne	.L338
	ldr	r3, [fp, #-1016]
	ldr	r4, [fp, #-1008]
	cmp	r3, r4
	beq	.L148
.L338:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #26
	mov	r3, r1, lsr #6
	orr	r3, r0, r3
	mov	r4, r2, lsr #6
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L148:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #25
	mov	r0, r3, lsr #7
	str	r0, [fp, #-1004]
	ldr	r1, [fp, #-1004]
	orr	r1, r2, r1
	str	r1, [fp, #-1004]
	mov	r2, r4, lsr #7
	str	r2, [fp, #-1000]
	sub	r3, fp, #1004
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-1004]
	str	r4, [fp, #-1000]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-996]
	str	r1, [fp, #-992]
	ldr	r1, [fp, #-1004]
	ldr	r2, [fp, #-996]
	cmp	r1, r2
	bne	.L339
	ldr	r3, [fp, #-1000]
	ldr	r4, [fp, #-992]
	cmp	r3, r4
	beq	.L150
.L339:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #25
	mov	r3, r1, lsr #7
	orr	r3, r0, r3
	mov	r4, r2, lsr #7
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L150:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #24
	mov	r0, r3, lsr #8
	str	r0, [fp, #-988]
	ldr	r1, [fp, #-988]
	orr	r1, r2, r1
	str	r1, [fp, #-988]
	mov	r2, r4, lsr #8
	str	r2, [fp, #-984]
	sub	r3, fp, #988
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-988]
	str	r4, [fp, #-984]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-980]
	str	r1, [fp, #-976]
	ldr	r1, [fp, #-988]
	ldr	r2, [fp, #-980]
	cmp	r1, r2
	bne	.L340
	ldr	r3, [fp, #-984]
	ldr	r4, [fp, #-976]
	cmp	r3, r4
	beq	.L152
.L340:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #24
	mov	r3, r1, lsr #8
	orr	r3, r0, r3
	mov	r4, r2, lsr #8
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L152:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #23
	mov	r0, r3, lsr #9
	str	r0, [fp, #-972]
	ldr	r1, [fp, #-972]
	orr	r1, r2, r1
	str	r1, [fp, #-972]
	mov	r2, r4, lsr #9
	str	r2, [fp, #-968]
	sub	r3, fp, #972
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-972]
	str	r4, [fp, #-968]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-964]
	str	r1, [fp, #-960]
	ldr	r1, [fp, #-972]
	ldr	r2, [fp, #-964]
	cmp	r1, r2
	bne	.L341
	ldr	r3, [fp, #-968]
	ldr	r4, [fp, #-960]
	cmp	r3, r4
	beq	.L154
.L341:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #23
	mov	r3, r1, lsr #9
	orr	r3, r0, r3
	mov	r4, r2, lsr #9
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L154:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #22
	mov	r0, r3, lsr #10
	str	r0, [fp, #-956]
	ldr	r1, [fp, #-956]
	orr	r1, r2, r1
	str	r1, [fp, #-956]
	mov	r2, r4, lsr #10
	str	r2, [fp, #-952]
	sub	r3, fp, #956
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-956]
	str	r4, [fp, #-952]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-948]
	str	r1, [fp, #-944]
	ldr	r1, [fp, #-956]
	ldr	r2, [fp, #-948]
	cmp	r1, r2
	bne	.L342
	ldr	r3, [fp, #-952]
	ldr	r4, [fp, #-944]
	cmp	r3, r4
	beq	.L156
.L342:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #22
	mov	r3, r1, lsr #10
	orr	r3, r0, r3
	mov	r4, r2, lsr #10
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L156:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #21
	mov	r0, r3, lsr #11
	str	r0, [fp, #-940]
	ldr	r1, [fp, #-940]
	orr	r1, r2, r1
	str	r1, [fp, #-940]
	mov	r2, r4, lsr #11
	str	r2, [fp, #-936]
	sub	r3, fp, #940
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-940]
	str	r4, [fp, #-936]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-932]
	str	r1, [fp, #-928]
	ldr	r1, [fp, #-940]
	ldr	r2, [fp, #-932]
	cmp	r1, r2
	bne	.L343
	ldr	r3, [fp, #-936]
	ldr	r4, [fp, #-928]
	cmp	r3, r4
	beq	.L158
.L343:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #21
	mov	r3, r1, lsr #11
	orr	r3, r0, r3
	mov	r4, r2, lsr #11
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L158:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #20
	mov	r0, r3, lsr #12
	str	r0, [fp, #-924]
	ldr	r1, [fp, #-924]
	orr	r1, r2, r1
	str	r1, [fp, #-924]
	mov	r2, r4, lsr #12
	str	r2, [fp, #-920]
	sub	r3, fp, #924
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-924]
	str	r4, [fp, #-920]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-916]
	str	r1, [fp, #-912]
	ldr	r1, [fp, #-924]
	ldr	r2, [fp, #-916]
	cmp	r1, r2
	bne	.L344
	ldr	r3, [fp, #-920]
	ldr	r4, [fp, #-912]
	cmp	r3, r4
	beq	.L160
.L344:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #20
	mov	r3, r1, lsr #12
	orr	r3, r0, r3
	mov	r4, r2, lsr #12
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L160:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #19
	mov	r0, r3, lsr #13
	str	r0, [fp, #-908]
	ldr	r1, [fp, #-908]
	orr	r1, r2, r1
	str	r1, [fp, #-908]
	mov	r2, r4, lsr #13
	str	r2, [fp, #-904]
	sub	r3, fp, #908
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-908]
	str	r4, [fp, #-904]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-900]
	str	r1, [fp, #-896]
	ldr	r1, [fp, #-908]
	ldr	r2, [fp, #-900]
	cmp	r1, r2
	bne	.L345
	ldr	r3, [fp, #-904]
	ldr	r4, [fp, #-896]
	cmp	r3, r4
	beq	.L162
.L345:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #19
	mov	r3, r1, lsr #13
	orr	r3, r0, r3
	mov	r4, r2, lsr #13
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
	b	.L402
.L403:
	.align	2
.L401:
	.word	left
	.word	.LC1
	.word	lright
.L402:
.L162:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #18
	mov	r0, r3, lsr #14
	str	r0, [fp, #-892]
	ldr	r1, [fp, #-892]
	orr	r1, r2, r1
	str	r1, [fp, #-892]
	mov	r2, r4, lsr #14
	str	r2, [fp, #-888]
	sub	r3, fp, #892
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-892]
	str	r4, [fp, #-888]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-884]
	str	r1, [fp, #-880]
	ldr	r1, [fp, #-892]
	ldr	r2, [fp, #-884]
	cmp	r1, r2
	bne	.L346
	ldr	r3, [fp, #-888]
	ldr	r4, [fp, #-880]
	cmp	r3, r4
	beq	.L164
.L346:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #18
	mov	r3, r1, lsr #14
	orr	r3, r0, r3
	mov	r4, r2, lsr #14
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L164:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #17
	mov	r0, r3, lsr #15
	str	r0, [fp, #-876]
	ldr	r1, [fp, #-876]
	orr	r1, r2, r1
	str	r1, [fp, #-876]
	mov	r2, r4, lsr #15
	str	r2, [fp, #-872]
	sub	r3, fp, #876
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-876]
	str	r4, [fp, #-872]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-868]
	str	r1, [fp, #-864]
	ldr	r1, [fp, #-876]
	ldr	r2, [fp, #-868]
	cmp	r1, r2
	bne	.L347
	ldr	r3, [fp, #-872]
	ldr	r4, [fp, #-864]
	cmp	r3, r4
	beq	.L166
.L347:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #17
	mov	r3, r1, lsr #15
	orr	r3, r0, r3
	mov	r4, r2, lsr #15
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L166:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #16
	mov	r0, r3, lsr #16
	str	r0, [fp, #-860]
	ldr	r1, [fp, #-860]
	orr	r1, r2, r1
	str	r1, [fp, #-860]
	mov	r2, r4, lsr #16
	str	r2, [fp, #-856]
	sub	r3, fp, #860
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-860]
	str	r4, [fp, #-856]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-852]
	str	r1, [fp, #-848]
	ldr	r1, [fp, #-860]
	ldr	r2, [fp, #-852]
	cmp	r1, r2
	bne	.L348
	ldr	r3, [fp, #-856]
	ldr	r4, [fp, #-848]
	cmp	r3, r4
	beq	.L168
.L348:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #16
	mov	r3, r1, lsr #16
	orr	r3, r0, r3
	mov	r4, r2, lsr #16
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L168:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #15
	mov	r0, r3, lsr #17
	str	r0, [fp, #-844]
	ldr	r1, [fp, #-844]
	orr	r1, r2, r1
	str	r1, [fp, #-844]
	mov	r2, r4, lsr #17
	str	r2, [fp, #-840]
	sub	r3, fp, #844
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-844]
	str	r4, [fp, #-840]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-836]
	str	r1, [fp, #-832]
	ldr	r1, [fp, #-844]
	ldr	r2, [fp, #-836]
	cmp	r1, r2
	bne	.L349
	ldr	r3, [fp, #-840]
	ldr	r4, [fp, #-832]
	cmp	r3, r4
	beq	.L170
.L349:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #15
	mov	r3, r1, lsr #17
	orr	r3, r0, r3
	mov	r4, r2, lsr #17
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L170:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #14
	mov	r0, r3, lsr #18
	str	r0, [fp, #-828]
	ldr	r1, [fp, #-828]
	orr	r1, r2, r1
	str	r1, [fp, #-828]
	mov	r2, r4, lsr #18
	str	r2, [fp, #-824]
	sub	r3, fp, #828
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-828]
	str	r4, [fp, #-824]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-820]
	str	r1, [fp, #-816]
	ldr	r1, [fp, #-828]
	ldr	r2, [fp, #-820]
	cmp	r1, r2
	bne	.L350
	ldr	r3, [fp, #-824]
	ldr	r4, [fp, #-816]
	cmp	r3, r4
	beq	.L172
.L350:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #14
	mov	r3, r1, lsr #18
	orr	r3, r0, r3
	mov	r4, r2, lsr #18
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L172:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #13
	mov	r0, r3, lsr #19
	str	r0, [fp, #-812]
	ldr	r1, [fp, #-812]
	orr	r1, r2, r1
	str	r1, [fp, #-812]
	mov	r2, r4, lsr #19
	str	r2, [fp, #-808]
	sub	r3, fp, #812
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-812]
	str	r4, [fp, #-808]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-804]
	str	r1, [fp, #-800]
	ldr	r1, [fp, #-812]
	ldr	r2, [fp, #-804]
	cmp	r1, r2
	bne	.L351
	ldr	r3, [fp, #-808]
	ldr	r4, [fp, #-800]
	cmp	r3, r4
	beq	.L174
.L351:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #13
	mov	r3, r1, lsr #19
	orr	r3, r0, r3
	mov	r4, r2, lsr #19
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L174:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #12
	mov	r0, r3, lsr #20
	str	r0, [fp, #-796]
	ldr	r1, [fp, #-796]
	orr	r1, r2, r1
	str	r1, [fp, #-796]
	mov	r2, r4, lsr #20
	str	r2, [fp, #-792]
	sub	r3, fp, #796
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-796]
	str	r4, [fp, #-792]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-788]
	str	r1, [fp, #-784]
	ldr	r1, [fp, #-796]
	ldr	r2, [fp, #-788]
	cmp	r1, r2
	bne	.L352
	ldr	r3, [fp, #-792]
	ldr	r4, [fp, #-784]
	cmp	r3, r4
	beq	.L176
.L352:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #12
	mov	r3, r1, lsr #20
	orr	r3, r0, r3
	mov	r4, r2, lsr #20
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L176:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #11
	mov	r0, r3, lsr #21
	str	r0, [fp, #-780]
	ldr	r1, [fp, #-780]
	orr	r1, r2, r1
	str	r1, [fp, #-780]
	mov	r2, r4, lsr #21
	str	r2, [fp, #-776]
	sub	r3, fp, #780
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-780]
	str	r4, [fp, #-776]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-772]
	str	r1, [fp, #-768]
	ldr	r1, [fp, #-780]
	ldr	r2, [fp, #-772]
	cmp	r1, r2
	bne	.L353
	ldr	r3, [fp, #-776]
	ldr	r4, [fp, #-768]
	cmp	r3, r4
	beq	.L178
.L353:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #11
	mov	r3, r1, lsr #21
	orr	r3, r0, r3
	mov	r4, r2, lsr #21
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L178:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #10
	mov	r0, r3, lsr #22
	str	r0, [fp, #-764]
	ldr	r1, [fp, #-764]
	orr	r1, r2, r1
	str	r1, [fp, #-764]
	mov	r2, r4, lsr #22
	str	r2, [fp, #-760]
	sub	r3, fp, #764
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-764]
	str	r4, [fp, #-760]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-756]
	str	r1, [fp, #-752]
	ldr	r1, [fp, #-764]
	ldr	r2, [fp, #-756]
	cmp	r1, r2
	bne	.L354
	ldr	r3, [fp, #-760]
	ldr	r4, [fp, #-752]
	cmp	r3, r4
	beq	.L180
.L354:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #10
	mov	r3, r1, lsr #22
	orr	r3, r0, r3
	mov	r4, r2, lsr #22
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L180:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #9
	mov	r0, r3, lsr #23
	str	r0, [fp, #-748]
	ldr	r1, [fp, #-748]
	orr	r1, r2, r1
	str	r1, [fp, #-748]
	mov	r2, r4, lsr #23
	str	r2, [fp, #-744]
	sub	r3, fp, #748
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-748]
	str	r4, [fp, #-744]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-740]
	str	r1, [fp, #-736]
	ldr	r1, [fp, #-748]
	ldr	r2, [fp, #-740]
	cmp	r1, r2
	bne	.L355
	ldr	r3, [fp, #-744]
	ldr	r4, [fp, #-736]
	cmp	r3, r4
	beq	.L182
.L355:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #9
	mov	r3, r1, lsr #23
	orr	r3, r0, r3
	mov	r4, r2, lsr #23
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L182:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #8
	mov	r0, r3, lsr #24
	str	r0, [fp, #-732]
	ldr	r1, [fp, #-732]
	orr	r1, r2, r1
	str	r1, [fp, #-732]
	mov	r2, r4, lsr #24
	str	r2, [fp, #-728]
	sub	r3, fp, #732
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-732]
	str	r4, [fp, #-728]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-724]
	str	r1, [fp, #-720]
	ldr	r1, [fp, #-732]
	ldr	r2, [fp, #-724]
	cmp	r1, r2
	bne	.L356
	ldr	r3, [fp, #-728]
	ldr	r4, [fp, #-720]
	cmp	r3, r4
	beq	.L184
.L356:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #8
	mov	r3, r1, lsr #24
	orr	r3, r0, r3
	mov	r4, r2, lsr #24
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L184:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #7
	mov	r0, r3, lsr #25
	str	r0, [fp, #-716]
	ldr	r1, [fp, #-716]
	orr	r1, r2, r1
	str	r1, [fp, #-716]
	mov	r2, r4, lsr #25
	str	r2, [fp, #-712]
	sub	r3, fp, #716
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-716]
	str	r4, [fp, #-712]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-708]
	str	r1, [fp, #-704]
	ldr	r1, [fp, #-716]
	ldr	r2, [fp, #-708]
	cmp	r1, r2
	bne	.L357
	ldr	r3, [fp, #-712]
	ldr	r4, [fp, #-704]
	cmp	r3, r4
	beq	.L186
.L357:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #7
	mov	r3, r1, lsr #25
	orr	r3, r0, r3
	mov	r4, r2, lsr #25
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L186:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #6
	mov	r0, r3, lsr #26
	str	r0, [fp, #-700]
	ldr	r1, [fp, #-700]
	orr	r1, r2, r1
	str	r1, [fp, #-700]
	mov	r2, r4, lsr #26
	str	r2, [fp, #-696]
	sub	r3, fp, #700
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-700]
	str	r4, [fp, #-696]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-692]
	str	r1, [fp, #-688]
	ldr	r1, [fp, #-700]
	ldr	r2, [fp, #-692]
	cmp	r1, r2
	bne	.L358
	ldr	r3, [fp, #-696]
	ldr	r4, [fp, #-688]
	cmp	r3, r4
	beq	.L188
.L358:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #6
	mov	r3, r1, lsr #26
	orr	r3, r0, r3
	mov	r4, r2, lsr #26
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L188:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #5
	mov	r0, r3, lsr #27
	str	r0, [fp, #-684]
	ldr	r1, [fp, #-684]
	orr	r1, r2, r1
	str	r1, [fp, #-684]
	mov	r2, r4, lsr #27
	str	r2, [fp, #-680]
	sub	r3, fp, #684
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-684]
	str	r4, [fp, #-680]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-676]
	str	r1, [fp, #-672]
	ldr	r1, [fp, #-684]
	ldr	r2, [fp, #-676]
	cmp	r1, r2
	bne	.L359
	ldr	r3, [fp, #-680]
	ldr	r4, [fp, #-672]
	cmp	r3, r4
	beq	.L190
.L359:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #5
	mov	r3, r1, lsr #27
	orr	r3, r0, r3
	mov	r4, r2, lsr #27
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L190:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #4
	mov	r0, r3, lsr #28
	str	r0, [fp, #-668]
	ldr	r1, [fp, #-668]
	orr	r1, r2, r1
	str	r1, [fp, #-668]
	mov	r2, r4, lsr #28
	str	r2, [fp, #-664]
	sub	r3, fp, #668
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-668]
	str	r4, [fp, #-664]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-660]
	str	r1, [fp, #-656]
	ldr	r1, [fp, #-668]
	ldr	r2, [fp, #-660]
	cmp	r1, r2
	bne	.L360
	ldr	r3, [fp, #-664]
	ldr	r4, [fp, #-656]
	cmp	r3, r4
	beq	.L192
.L360:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #4
	mov	r3, r1, lsr #28
	orr	r3, r0, r3
	mov	r4, r2, lsr #28
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L192:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #3
	mov	r0, r3, lsr #29
	str	r0, [fp, #-652]
	ldr	r1, [fp, #-652]
	orr	r1, r2, r1
	str	r1, [fp, #-652]
	mov	r2, r4, lsr #29
	str	r2, [fp, #-648]
	sub	r3, fp, #652
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-652]
	str	r4, [fp, #-648]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-644]
	str	r1, [fp, #-640]
	ldr	r1, [fp, #-652]
	ldr	r2, [fp, #-644]
	cmp	r1, r2
	bne	.L361
	ldr	r3, [fp, #-648]
	ldr	r4, [fp, #-640]
	cmp	r3, r4
	beq	.L194
.L361:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #3
	mov	r3, r1, lsr #29
	orr	r3, r0, r3
	mov	r4, r2, lsr #29
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L194:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #2
	mov	r0, r3, lsr #30
	str	r0, [fp, #-636]
	ldr	r1, [fp, #-636]
	orr	r1, r2, r1
	str	r1, [fp, #-636]
	mov	r2, r4, lsr #30
	str	r2, [fp, #-632]
	sub	r3, fp, #636
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-636]
	str	r4, [fp, #-632]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-628]
	str	r1, [fp, #-624]
	ldr	r1, [fp, #-636]
	ldr	r2, [fp, #-628]
	cmp	r1, r2
	bne	.L362
	ldr	r3, [fp, #-632]
	ldr	r4, [fp, #-624]
	cmp	r3, r4
	beq	.L196
.L362:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #2
	mov	r3, r1, lsr #30
	orr	r3, r0, r3
	mov	r4, r2, lsr #30
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L196:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r2, r4, asl #1
	mov	r0, r3, lsr #31
	str	r0, [fp, #-620]
	ldr	r1, [fp, #-620]
	orr	r1, r2, r1
	str	r1, [fp, #-620]
	mov	r2, r4, lsr #31
	str	r2, [fp, #-616]
	sub	r3, fp, #620
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-620]
	str	r4, [fp, #-616]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-612]
	str	r1, [fp, #-608]
	ldr	r1, [fp, #-620]
	ldr	r2, [fp, #-612]
	cmp	r1, r2
	bne	.L363
	ldr	r3, [fp, #-616]
	ldr	r4, [fp, #-608]
	cmp	r3, r4
	beq	.L198
.L363:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r0, r2, asl #1
	mov	r3, r1, lsr #31
	orr	r3, r0, r3
	mov	r4, r2, lsr #31
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L198:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4
	str	r0, [fp, #-604]
	mov	r1, #0
	str	r1, [fp, #-600]
	sub	r2, fp, #604
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-604]
	str	r3, [fp, #-600]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-596]
	str	r1, [fp, #-592]
	ldr	r1, [fp, #-604]
	ldr	r2, [fp, #-596]
	cmp	r1, r2
	bne	.L364
	ldr	r3, [fp, #-600]
	ldr	r4, [fp, #-592]
	cmp	r3, r4
	beq	.L200
.L364:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L200:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #1
	str	r0, [fp, #-588]
	mov	r1, #0
	str	r1, [fp, #-584]
	sub	r2, fp, #588
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-588]
	str	r3, [fp, #-584]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-580]
	str	r1, [fp, #-576]
	ldr	r1, [fp, #-588]
	ldr	r2, [fp, #-580]
	cmp	r1, r2
	bne	.L365
	ldr	r3, [fp, #-584]
	ldr	r4, [fp, #-576]
	cmp	r3, r4
	beq	.L202
.L365:
	ldr	r3, [fp, #-56]
	ldr	r2, .L401+8
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #1
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L202:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #2
	str	r0, [fp, #-572]
	mov	r1, #0
	str	r1, [fp, #-568]
	sub	r2, fp, #572
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-572]
	str	r3, [fp, #-568]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-564]
	str	r1, [fp, #-560]
	ldr	r1, [fp, #-572]
	ldr	r2, [fp, #-564]
	cmp	r1, r2
	bne	.L366
	ldr	r3, [fp, #-568]
	ldr	r4, [fp, #-560]
	cmp	r3, r4
	beq	.L204
.L366:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #2
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L204:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #3
	str	r0, [fp, #-556]
	mov	r1, #0
	str	r1, [fp, #-552]
	sub	r2, fp, #556
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-556]
	str	r3, [fp, #-552]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-548]
	str	r1, [fp, #-544]
	ldr	r1, [fp, #-556]
	ldr	r2, [fp, #-548]
	cmp	r1, r2
	bne	.L367
	ldr	r3, [fp, #-552]
	ldr	r4, [fp, #-544]
	cmp	r3, r4
	beq	.L206
.L367:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #3
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L206:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #4
	str	r0, [fp, #-540]
	mov	r1, #0
	str	r1, [fp, #-536]
	sub	r2, fp, #540
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-540]
	str	r3, [fp, #-536]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-532]
	str	r1, [fp, #-528]
	ldr	r1, [fp, #-540]
	ldr	r2, [fp, #-532]
	cmp	r1, r2
	bne	.L368
	ldr	r3, [fp, #-536]
	ldr	r4, [fp, #-528]
	cmp	r3, r4
	beq	.L208
.L368:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #4
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L208:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #5
	str	r0, [fp, #-524]
	mov	r1, #0
	str	r1, [fp, #-520]
	sub	r2, fp, #524
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-524]
	str	r3, [fp, #-520]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-516]
	str	r1, [fp, #-512]
	ldr	r1, [fp, #-524]
	ldr	r2, [fp, #-516]
	cmp	r1, r2
	bne	.L369
	ldr	r3, [fp, #-520]
	ldr	r4, [fp, #-512]
	cmp	r3, r4
	beq	.L210
.L369:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #5
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L210:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #6
	str	r0, [fp, #-508]
	mov	r1, #0
	str	r1, [fp, #-504]
	sub	r2, fp, #508
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-508]
	str	r3, [fp, #-504]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-500]
	str	r1, [fp, #-496]
	ldr	r1, [fp, #-508]
	ldr	r2, [fp, #-500]
	cmp	r1, r2
	bne	.L370
	ldr	r3, [fp, #-504]
	ldr	r4, [fp, #-496]
	cmp	r3, r4
	beq	.L212
.L370:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #6
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L212:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #7
	str	r0, [fp, #-492]
	mov	r1, #0
	str	r1, [fp, #-488]
	sub	r2, fp, #492
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-492]
	str	r3, [fp, #-488]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-484]
	str	r1, [fp, #-480]
	ldr	r1, [fp, #-492]
	ldr	r2, [fp, #-484]
	cmp	r1, r2
	bne	.L371
	ldr	r3, [fp, #-488]
	ldr	r4, [fp, #-480]
	cmp	r3, r4
	beq	.L214
.L371:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #7
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L214:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #8
	str	r0, [fp, #-476]
	mov	r1, #0
	str	r1, [fp, #-472]
	sub	r2, fp, #476
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-476]
	str	r3, [fp, #-472]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-468]
	str	r1, [fp, #-464]
	ldr	r1, [fp, #-476]
	ldr	r2, [fp, #-468]
	cmp	r1, r2
	bne	.L372
	ldr	r3, [fp, #-472]
	ldr	r4, [fp, #-464]
	cmp	r3, r4
	beq	.L216
.L372:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #8
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L216:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #9
	str	r0, [fp, #-460]
	mov	r1, #0
	str	r1, [fp, #-456]
	sub	r2, fp, #460
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-460]
	str	r3, [fp, #-456]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-452]
	str	r1, [fp, #-448]
	ldr	r1, [fp, #-460]
	ldr	r2, [fp, #-452]
	cmp	r1, r2
	bne	.L373
	ldr	r3, [fp, #-456]
	ldr	r4, [fp, #-448]
	cmp	r3, r4
	beq	.L218
.L373:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #9
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L218:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #10
	str	r0, [fp, #-444]
	mov	r1, #0
	str	r1, [fp, #-440]
	sub	r2, fp, #444
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-444]
	str	r3, [fp, #-440]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-436]
	str	r1, [fp, #-432]
	ldr	r1, [fp, #-444]
	ldr	r2, [fp, #-436]
	cmp	r1, r2
	bne	.L374
	ldr	r3, [fp, #-440]
	ldr	r4, [fp, #-432]
	cmp	r3, r4
	beq	.L220
.L374:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #10
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L220:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #11
	str	r0, [fp, #-428]
	mov	r1, #0
	str	r1, [fp, #-424]
	sub	r2, fp, #428
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-428]
	str	r3, [fp, #-424]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-420]
	str	r1, [fp, #-416]
	ldr	r1, [fp, #-428]
	ldr	r2, [fp, #-420]
	cmp	r1, r2
	bne	.L375
	ldr	r3, [fp, #-424]
	ldr	r4, [fp, #-416]
	cmp	r3, r4
	beq	.L222
.L375:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #11
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L222:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #12
	str	r0, [fp, #-412]
	mov	r1, #0
	str	r1, [fp, #-408]
	sub	r2, fp, #412
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-412]
	str	r3, [fp, #-408]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-404]
	str	r1, [fp, #-400]
	ldr	r1, [fp, #-412]
	ldr	r2, [fp, #-404]
	cmp	r1, r2
	bne	.L376
	ldr	r3, [fp, #-408]
	ldr	r4, [fp, #-400]
	cmp	r3, r4
	beq	.L224
.L376:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #12
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L224:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #13
	str	r0, [fp, #-396]
	mov	r1, #0
	str	r1, [fp, #-392]
	sub	r2, fp, #396
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-396]
	str	r3, [fp, #-392]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-388]
	str	r1, [fp, #-384]
	ldr	r1, [fp, #-396]
	ldr	r2, [fp, #-388]
	cmp	r1, r2
	bne	.L377
	ldr	r3, [fp, #-392]
	ldr	r4, [fp, #-384]
	cmp	r3, r4
	beq	.L226
.L377:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #13
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L226:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #14
	str	r0, [fp, #-380]
	mov	r1, #0
	str	r1, [fp, #-376]
	sub	r2, fp, #380
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-380]
	str	r3, [fp, #-376]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-372]
	str	r1, [fp, #-368]
	ldr	r1, [fp, #-380]
	ldr	r2, [fp, #-372]
	cmp	r1, r2
	bne	.L378
	ldr	r3, [fp, #-376]
	ldr	r4, [fp, #-368]
	cmp	r3, r4
	beq	.L228
.L378:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #14
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L228:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #15
	str	r0, [fp, #-364]
	mov	r1, #0
	str	r1, [fp, #-360]
	sub	r2, fp, #364
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-364]
	str	r3, [fp, #-360]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-356]
	str	r1, [fp, #-352]
	ldr	r1, [fp, #-364]
	ldr	r2, [fp, #-356]
	cmp	r1, r2
	bne	.L379
	ldr	r3, [fp, #-360]
	ldr	r4, [fp, #-352]
	cmp	r3, r4
	beq	.L230
.L379:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #15
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L230:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #16
	str	r0, [fp, #-348]
	mov	r1, #0
	str	r1, [fp, #-344]
	sub	r2, fp, #348
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-348]
	str	r3, [fp, #-344]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-340]
	str	r1, [fp, #-336]
	ldr	r1, [fp, #-348]
	ldr	r2, [fp, #-340]
	cmp	r1, r2
	bne	.L380
	ldr	r3, [fp, #-344]
	ldr	r4, [fp, #-336]
	cmp	r3, r4
	beq	.L232
.L380:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #16
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L232:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #17
	str	r0, [fp, #-332]
	mov	r1, #0
	str	r1, [fp, #-328]
	sub	r2, fp, #332
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-332]
	str	r3, [fp, #-328]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-324]
	str	r1, [fp, #-320]
	ldr	r1, [fp, #-332]
	ldr	r2, [fp, #-324]
	cmp	r1, r2
	bne	.L381
	ldr	r3, [fp, #-328]
	ldr	r4, [fp, #-320]
	cmp	r3, r4
	beq	.L234
.L381:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #17
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L234:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #18
	str	r0, [fp, #-316]
	mov	r1, #0
	str	r1, [fp, #-312]
	sub	r2, fp, #316
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-316]
	str	r3, [fp, #-312]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-308]
	str	r1, [fp, #-304]
	ldr	r1, [fp, #-316]
	ldr	r2, [fp, #-308]
	cmp	r1, r2
	bne	.L382
	ldr	r3, [fp, #-312]
	ldr	r4, [fp, #-304]
	cmp	r3, r4
	beq	.L236
.L382:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #18
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L236:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #19
	str	r0, [fp, #-300]
	mov	r1, #0
	str	r1, [fp, #-296]
	sub	r2, fp, #300
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-300]
	str	r3, [fp, #-296]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-292]
	str	r1, [fp, #-288]
	ldr	r1, [fp, #-300]
	ldr	r2, [fp, #-292]
	cmp	r1, r2
	bne	.L383
	ldr	r3, [fp, #-296]
	ldr	r4, [fp, #-288]
	cmp	r3, r4
	beq	.L238
.L383:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #19
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L238:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #20
	str	r0, [fp, #-284]
	mov	r1, #0
	str	r1, [fp, #-280]
	sub	r2, fp, #284
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-284]
	str	r3, [fp, #-280]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-276]
	str	r1, [fp, #-272]
	ldr	r1, [fp, #-284]
	ldr	r2, [fp, #-276]
	cmp	r1, r2
	bne	.L384
	ldr	r3, [fp, #-280]
	ldr	r4, [fp, #-272]
	cmp	r3, r4
	beq	.L240
.L384:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #20
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L240:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #21
	str	r0, [fp, #-268]
	mov	r1, #0
	str	r1, [fp, #-264]
	sub	r2, fp, #268
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-268]
	str	r3, [fp, #-264]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-260]
	str	r1, [fp, #-256]
	ldr	r1, [fp, #-268]
	ldr	r2, [fp, #-260]
	cmp	r1, r2
	bne	.L385
	ldr	r3, [fp, #-264]
	ldr	r4, [fp, #-256]
	cmp	r3, r4
	beq	.L242
.L385:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #21
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L242:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #22
	str	r0, [fp, #-252]
	mov	r1, #0
	str	r1, [fp, #-248]
	sub	r2, fp, #252
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-252]
	str	r3, [fp, #-248]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-244]
	str	r1, [fp, #-240]
	ldr	r1, [fp, #-252]
	ldr	r2, [fp, #-244]
	cmp	r1, r2
	bne	.L386
	ldr	r3, [fp, #-248]
	ldr	r4, [fp, #-240]
	cmp	r3, r4
	beq	.L244
.L386:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #22
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L244:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #23
	str	r0, [fp, #-236]
	mov	r1, #0
	str	r1, [fp, #-232]
	sub	r2, fp, #236
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-236]
	str	r3, [fp, #-232]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-228]
	str	r1, [fp, #-224]
	ldr	r1, [fp, #-236]
	ldr	r2, [fp, #-228]
	cmp	r1, r2
	bne	.L387
	ldr	r3, [fp, #-232]
	ldr	r4, [fp, #-224]
	cmp	r3, r4
	beq	.L246
.L387:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #23
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L246:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #24
	str	r0, [fp, #-220]
	mov	r1, #0
	str	r1, [fp, #-216]
	sub	r2, fp, #220
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-220]
	str	r3, [fp, #-216]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-212]
	str	r1, [fp, #-208]
	ldr	r1, [fp, #-220]
	ldr	r2, [fp, #-212]
	cmp	r1, r2
	bne	.L388
	b	.L405
.L406:
	.align	2
.L404:
	.word	lright
	.word	lright
.L405:
	ldr	r3, [fp, #-216]
	ldr	r4, [fp, #-208]
	cmp	r3, r4
	beq	.L248
.L388:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #24
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L248:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #25
	str	r0, [fp, #-204]
	mov	r1, #0
	str	r1, [fp, #-200]
	sub	r2, fp, #204
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-204]
	str	r3, [fp, #-200]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-196]
	str	r1, [fp, #-192]
	ldr	r1, [fp, #-204]
	ldr	r2, [fp, #-196]
	cmp	r1, r2
	bne	.L389
	ldr	r3, [fp, #-200]
	ldr	r4, [fp, #-192]
	cmp	r3, r4
	beq	.L250
.L389:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #25
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L250:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #26
	str	r0, [fp, #-188]
	mov	r1, #0
	str	r1, [fp, #-184]
	sub	r2, fp, #188
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-188]
	str	r3, [fp, #-184]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-180]
	str	r1, [fp, #-176]
	ldr	r1, [fp, #-188]
	ldr	r2, [fp, #-180]
	cmp	r1, r2
	bne	.L390
	ldr	r3, [fp, #-184]
	ldr	r4, [fp, #-176]
	cmp	r3, r4
	beq	.L252
.L390:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #26
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L252:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #27
	str	r0, [fp, #-172]
	mov	r1, #0
	str	r1, [fp, #-168]
	sub	r2, fp, #172
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-172]
	str	r3, [fp, #-168]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-164]
	str	r1, [fp, #-160]
	ldr	r1, [fp, #-172]
	ldr	r2, [fp, #-164]
	cmp	r1, r2
	bne	.L391
	ldr	r3, [fp, #-168]
	ldr	r4, [fp, #-160]
	cmp	r3, r4
	beq	.L254
.L391:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #27
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L254:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #28
	str	r0, [fp, #-156]
	mov	r1, #0
	str	r1, [fp, #-152]
	sub	r2, fp, #156
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-156]
	str	r3, [fp, #-152]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-148]
	str	r1, [fp, #-144]
	ldr	r1, [fp, #-156]
	ldr	r2, [fp, #-148]
	cmp	r1, r2
	bne	.L392
	ldr	r3, [fp, #-152]
	ldr	r4, [fp, #-144]
	cmp	r3, r4
	beq	.L256
.L392:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #28
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L256:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #29
	str	r0, [fp, #-140]
	mov	r1, #0
	str	r1, [fp, #-136]
	sub	r2, fp, #140
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-140]
	str	r3, [fp, #-136]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-132]
	str	r1, [fp, #-128]
	ldr	r1, [fp, #-140]
	ldr	r2, [fp, #-132]
	cmp	r1, r2
	bne	.L393
	ldr	r3, [fp, #-136]
	ldr	r4, [fp, #-128]
	cmp	r3, r4
	beq	.L258
.L393:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #29
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L258:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #30
	str	r0, [fp, #-124]
	mov	r1, #0
	str	r1, [fp, #-120]
	sub	r2, fp, #124
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-124]
	str	r3, [fp, #-120]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-116]
	str	r1, [fp, #-112]
	ldr	r1, [fp, #-124]
	ldr	r2, [fp, #-116]
	cmp	r1, r2
	bne	.L394
	ldr	r3, [fp, #-120]
	ldr	r4, [fp, #-112]
	cmp	r3, r4
	beq	.L260
.L394:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #30
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L260:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r0, r4, lsr #31
	str	r0, [fp, #-108]
	mov	r1, #0
	str	r1, [fp, #-104]
	sub	r2, fp, #108
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-108]
	str	r3, [fp, #-104]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-100]
	str	r1, [fp, #-96]
	ldr	r1, [fp, #-108]
	ldr	r2, [fp, #-100]
	cmp	r1, r2
	bne	.L395
	ldr	r3, [fp, #-104]
	ldr	r4, [fp, #-96]
	cmp	r3, r4
	beq	.L262
.L395:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, lsr #31
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L262:
	cfstr64	mvdx8, [fp, #-92]
	mov	r0, #0
	str	r0, [fp, #-84]
	mov	r1, #0
	str	r1, [fp, #-80]
	sub	r2, fp, #84
	ldmia	r2, {r2-r3}
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	ldr	r1, [fp, #-84]
	ldr	r2, [fp, #-76]
	cmp	r1, r2
	bne	.L396
	ldr	r3, [fp, #-80]
	ldr	r4, [fp, #-72]
	cmp	r3, r4
	beq	.L397
.L396:
	ldr	r3, [fp, #-56]
	ldr	r2, .L404+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfstr64	mvdx8, [fp, #-68]
	mov	r3, #0
	mov	r4, #0
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L397:
	cfldrd	mvd8, [fp, #-32]
	sub	sp, fp, #24
	ldmfd	sp, {r4, r5, r6, fp, sp, lr}
	bx	lr
	.size	uitest, .-uitest
	.section	.rodata
	.align	2
.LC2:
	.ascii	"ASR failed at %02d: 0x%016llx 0x%016llx\012\000"
	.text
	.align	2
	.global	itest
	.type	itest, %function
itest:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 1072
	@ frame_needed = 1, uses_anonymous_args = 0
	mov	ip, sp
	stmfd	sp!, {r4, r5, r6, fp, ip, lr, pc}
	cfstrd	mvd8, [sp, #-8]!
	sub	fp, ip, #4
	sub	sp, sp, #1072
	sub	sp, sp, #12
	str	r0, [fp, #-52]
	str	r1, [fp, #-48]
	mvn	r0, #0
	str	r0, [fp, #-56]
	ldr	r3, .L605
	str	r3, [fp, #-40]
	cfldr64	mvdx8, [fp, #-52]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1104
	cfstr64	mvdx0, [r0, #4]
	sub	r1, fp, #1088
	cfstr64	mvdx8, [r1, #-4]
	ldr	r2, [fp, #-1100]
	ldr	r3, [fp, #-1092]
	cmp	r2, r3
	bne	.L539
	ldr	r4, [fp, #-1096]
	ldr	r0, [fp, #-1088]
	cmp	r4, r0
	beq	.L408
.L539:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L408:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	movs	r2, r4, asr #1
	mov	r1, r3, rrx
	sub	r0, fp, #1088
	stmib	r0, {r1-r2}
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1072
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1084]
	ldr	r2, [fp, #-1076]
	cmp	r1, r2
	bne	.L540
	ldr	r3, [fp, #-1080]
	ldr	r4, [fp, #-1072]
	cmp	r3, r4
	beq	.L410
.L540:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	movs	r4, r4, asr #1
	mov	r3, r3, rrx
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L410:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #-2
	sub	r0, fp, #1072
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1056
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1068]
	ldr	r2, [fp, #-1060]
	cmp	r1, r2
	bne	.L541
	ldr	r3, [fp, #-1064]
	ldr	r4, [fp, #-1056]
	cmp	r3, r4
	beq	.L412
.L541:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-2
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L412:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #-3
	sub	r0, fp, #1056
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1040
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1052]
	ldr	r2, [fp, #-1044]
	cmp	r1, r2
	bne	.L542
	ldr	r3, [fp, #-1048]
	ldr	r4, [fp, #-1040]
	cmp	r3, r4
	beq	.L414
.L542:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-3
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L414:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx1, mvdx0, #-4
	sub	r0, fp, #1040
	cfstr64	mvdx1, [r0, #4]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	cfldr64	mvdx0, [r3, #0]
	sub	r0, fp, #1024
	cfstr64	mvdx0, [r0, #-4]
	ldr	r1, [fp, #-1036]
	ldr	r2, [fp, #-1028]
	cmp	r1, r2
	bne	.L543
	ldr	r3, [fp, #-1032]
	ldr	r4, [fp, #-1024]
	cmp	r3, r4
	beq	.L416
.L543:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-4
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L416:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-5
	cfstr64	mvdx0, [fp, #-1020]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-1012]
	str	r2, [fp, #-1008]
	ldr	r2, [fp, #-1020]
	ldr	r3, [fp, #-1012]
	cmp	r2, r3
	bne	.L544
	ldr	r4, [fp, #-1016]
	ldr	r0, [fp, #-1008]
	cmp	r4, r0
	beq	.L418
.L544:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-5
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L418:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-6
	cfstr64	mvdx0, [fp, #-1004]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-996]
	str	r1, [fp, #-992]
	ldr	r1, [fp, #-1004]
	ldr	r2, [fp, #-996]
	cmp	r1, r2
	bne	.L545
	ldr	r3, [fp, #-1000]
	ldr	r4, [fp, #-992]
	cmp	r3, r4
	beq	.L420
.L545:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-6
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L420:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-7
	cfstr64	mvdx0, [fp, #-988]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-980]
	str	r2, [fp, #-976]
	ldr	r2, [fp, #-988]
	ldr	r3, [fp, #-980]
	cmp	r2, r3
	bne	.L546
	ldr	r4, [fp, #-984]
	ldr	r0, [fp, #-976]
	cmp	r4, r0
	beq	.L422
.L546:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-7
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L422:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-8
	cfstr64	mvdx0, [fp, #-972]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-964]
	str	r1, [fp, #-960]
	ldr	r1, [fp, #-972]
	ldr	r2, [fp, #-964]
	cmp	r1, r2
	bne	.L547
	ldr	r3, [fp, #-968]
	ldr	r4, [fp, #-960]
	cmp	r3, r4
	beq	.L424
.L547:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-8
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L424:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-9
	cfstr64	mvdx0, [fp, #-956]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-948]
	str	r2, [fp, #-944]
	ldr	r2, [fp, #-956]
	ldr	r3, [fp, #-948]
	cmp	r2, r3
	bne	.L548
	ldr	r4, [fp, #-952]
	ldr	r0, [fp, #-944]
	cmp	r4, r0
	beq	.L426
.L548:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-9
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L426:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-10
	cfstr64	mvdx0, [fp, #-940]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-932]
	str	r1, [fp, #-928]
	ldr	r1, [fp, #-940]
	ldr	r2, [fp, #-932]
	cmp	r1, r2
	bne	.L549
	ldr	r3, [fp, #-936]
	ldr	r4, [fp, #-928]
	cmp	r3, r4
	beq	.L428
.L549:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-10
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L428:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-11
	cfstr64	mvdx0, [fp, #-924]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-916]
	str	r2, [fp, #-912]
	ldr	r2, [fp, #-924]
	ldr	r3, [fp, #-916]
	cmp	r2, r3
	bne	.L550
	ldr	r4, [fp, #-920]
	ldr	r0, [fp, #-912]
	cmp	r4, r0
	beq	.L430
.L550:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-11
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L430:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-12
	cfstr64	mvdx0, [fp, #-908]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-900]
	str	r1, [fp, #-896]
	ldr	r1, [fp, #-908]
	ldr	r2, [fp, #-900]
	cmp	r1, r2
	bne	.L551
	ldr	r3, [fp, #-904]
	ldr	r4, [fp, #-896]
	cmp	r3, r4
	beq	.L432
.L551:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-12
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L432:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-13
	cfstr64	mvdx0, [fp, #-892]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-884]
	str	r2, [fp, #-880]
	ldr	r2, [fp, #-892]
	ldr	r3, [fp, #-884]
	cmp	r2, r3
	bne	.L552
	ldr	r4, [fp, #-888]
	ldr	r0, [fp, #-880]
	cmp	r4, r0
	beq	.L434
.L552:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-13
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L434:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-14
	cfstr64	mvdx0, [fp, #-876]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-868]
	str	r1, [fp, #-864]
	ldr	r1, [fp, #-876]
	ldr	r2, [fp, #-868]
	cmp	r1, r2
	bne	.L553
	ldr	r3, [fp, #-872]
	ldr	r4, [fp, #-864]
	cmp	r3, r4
	beq	.L436
.L553:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-14
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L436:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-15
	cfstr64	mvdx0, [fp, #-860]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-852]
	str	r2, [fp, #-848]
	ldr	r2, [fp, #-860]
	ldr	r3, [fp, #-852]
	cmp	r2, r3
	bne	.L554
	ldr	r4, [fp, #-856]
	ldr	r0, [fp, #-848]
	cmp	r4, r0
	beq	.L438
.L554:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-15
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L438:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-16
	cfstr64	mvdx0, [fp, #-844]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-836]
	str	r1, [fp, #-832]
	ldr	r1, [fp, #-844]
	ldr	r2, [fp, #-836]
	cmp	r1, r2
	bne	.L555
	ldr	r3, [fp, #-840]
	ldr	r4, [fp, #-832]
	cmp	r3, r4
	beq	.L440
.L555:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-16
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L440:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-17
	cfstr64	mvdx0, [fp, #-828]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-820]
	str	r2, [fp, #-816]
	ldr	r2, [fp, #-828]
	ldr	r3, [fp, #-820]
	cmp	r2, r3
	bne	.L556
	ldr	r4, [fp, #-824]
	ldr	r0, [fp, #-816]
	cmp	r4, r0
	beq	.L442
.L556:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-17
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L442:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-18
	cfstr64	mvdx0, [fp, #-812]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-804]
	str	r1, [fp, #-800]
	ldr	r1, [fp, #-812]
	ldr	r2, [fp, #-804]
	cmp	r1, r2
	bne	.L557
	ldr	r3, [fp, #-808]
	ldr	r4, [fp, #-800]
	cmp	r3, r4
	beq	.L444
.L557:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-18
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L444:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-19
	cfstr64	mvdx0, [fp, #-796]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-788]
	str	r2, [fp, #-784]
	ldr	r2, [fp, #-796]
	ldr	r3, [fp, #-788]
	cmp	r2, r3
	bne	.L558
	ldr	r4, [fp, #-792]
	ldr	r0, [fp, #-784]
	cmp	r4, r0
	beq	.L446
.L558:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-19
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L446:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-20
	cfstr64	mvdx0, [fp, #-780]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-772]
	str	r1, [fp, #-768]
	ldr	r1, [fp, #-780]
	ldr	r2, [fp, #-772]
	cmp	r1, r2
	bne	.L559
	ldr	r3, [fp, #-776]
	ldr	r4, [fp, #-768]
	cmp	r3, r4
	beq	.L448
.L559:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-20
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L448:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-21
	cfstr64	mvdx0, [fp, #-764]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-756]
	str	r2, [fp, #-752]
	ldr	r2, [fp, #-764]
	ldr	r3, [fp, #-756]
	cmp	r2, r3
	bne	.L560
	ldr	r4, [fp, #-760]
	ldr	r0, [fp, #-752]
	cmp	r4, r0
	beq	.L450
.L560:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-21
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L450:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-22
	cfstr64	mvdx0, [fp, #-748]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-740]
	str	r1, [fp, #-736]
	ldr	r1, [fp, #-748]
	ldr	r2, [fp, #-740]
	cmp	r1, r2
	bne	.L561
	ldr	r3, [fp, #-744]
	ldr	r4, [fp, #-736]
	cmp	r3, r4
	beq	.L452
.L561:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-22
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L452:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-23
	cfstr64	mvdx0, [fp, #-732]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-724]
	str	r2, [fp, #-720]
	ldr	r2, [fp, #-732]
	ldr	r3, [fp, #-724]
	cmp	r2, r3
	bne	.L562
	ldr	r4, [fp, #-728]
	ldr	r0, [fp, #-720]
	cmp	r4, r0
	beq	.L454
.L562:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-23
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L454:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-24
	cfstr64	mvdx0, [fp, #-716]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-708]
	str	r1, [fp, #-704]
	ldr	r1, [fp, #-716]
	ldr	r2, [fp, #-708]
	cmp	r1, r2
	bne	.L563
	ldr	r3, [fp, #-712]
	ldr	r4, [fp, #-704]
	cmp	r3, r4
	beq	.L456
.L563:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-24
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L456:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-25
	cfstr64	mvdx0, [fp, #-700]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-692]
	str	r2, [fp, #-688]
	ldr	r2, [fp, #-700]
	ldr	r3, [fp, #-692]
	cmp	r2, r3
	bne	.L564
	ldr	r4, [fp, #-696]
	ldr	r0, [fp, #-688]
	cmp	r4, r0
	beq	.L458
.L564:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-25
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L458:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-26
	cfstr64	mvdx0, [fp, #-684]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-676]
	str	r1, [fp, #-672]
	ldr	r1, [fp, #-684]
	ldr	r2, [fp, #-676]
	cmp	r1, r2
	bne	.L565
	ldr	r3, [fp, #-680]
	ldr	r4, [fp, #-672]
	cmp	r3, r4
	beq	.L460
.L565:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-26
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L460:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-27
	cfstr64	mvdx0, [fp, #-668]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-660]
	str	r2, [fp, #-656]
	ldr	r2, [fp, #-668]
	ldr	r3, [fp, #-660]
	cmp	r2, r3
	bne	.L566
	ldr	r4, [fp, #-664]
	ldr	r0, [fp, #-656]
	cmp	r4, r0
	beq	.L462
.L566:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-27
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
	b	.L606
.L607:
	.align	2
.L605:
	.word	.LC2
	.word	aright
.L606:
.L462:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-28
	cfstr64	mvdx0, [fp, #-652]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-644]
	str	r1, [fp, #-640]
	ldr	r1, [fp, #-652]
	ldr	r2, [fp, #-644]
	cmp	r1, r2
	bne	.L567
	ldr	r3, [fp, #-648]
	ldr	r4, [fp, #-640]
	cmp	r3, r4
	beq	.L464
.L567:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-28
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L464:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-29
	cfstr64	mvdx0, [fp, #-636]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-628]
	str	r2, [fp, #-624]
	ldr	r2, [fp, #-636]
	ldr	r3, [fp, #-628]
	cmp	r2, r3
	bne	.L568
	ldr	r4, [fp, #-632]
	ldr	r0, [fp, #-624]
	cmp	r4, r0
	beq	.L466
.L568:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-29
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L466:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-30
	cfstr64	mvdx0, [fp, #-620]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-612]
	str	r1, [fp, #-608]
	ldr	r1, [fp, #-620]
	ldr	r2, [fp, #-612]
	cmp	r1, r2
	bne	.L569
	ldr	r3, [fp, #-616]
	ldr	r4, [fp, #-608]
	cmp	r3, r4
	beq	.L468
.L569:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-30
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L468:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-31
	cfstr64	mvdx0, [fp, #-604]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-596]
	str	r2, [fp, #-592]
	ldr	r2, [fp, #-604]
	ldr	r3, [fp, #-596]
	cmp	r2, r3
	bne	.L570
	ldr	r4, [fp, #-600]
	ldr	r0, [fp, #-592]
	cmp	r4, r0
	beq	.L470
.L570:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-31
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L470:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-32
	cfstr64	mvdx0, [fp, #-588]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-580]
	str	r1, [fp, #-576]
	ldr	r1, [fp, #-588]
	ldr	r2, [fp, #-580]
	cmp	r1, r2
	bne	.L571
	ldr	r3, [fp, #-584]
	ldr	r4, [fp, #-576]
	cmp	r3, r4
	beq	.L472
.L571:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-32
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L472:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-33
	cfstr64	mvdx0, [fp, #-572]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-564]
	str	r2, [fp, #-560]
	ldr	r2, [fp, #-572]
	ldr	r3, [fp, #-564]
	cmp	r2, r3
	bne	.L572
	ldr	r4, [fp, #-568]
	ldr	r0, [fp, #-560]
	cmp	r4, r0
	beq	.L474
.L572:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-33
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L474:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-34
	cfstr64	mvdx0, [fp, #-556]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-548]
	str	r1, [fp, #-544]
	ldr	r1, [fp, #-556]
	ldr	r2, [fp, #-548]
	cmp	r1, r2
	bne	.L573
	ldr	r3, [fp, #-552]
	ldr	r4, [fp, #-544]
	cmp	r3, r4
	beq	.L476
.L573:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-34
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L476:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-35
	cfstr64	mvdx0, [fp, #-540]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-532]
	str	r2, [fp, #-528]
	ldr	r2, [fp, #-540]
	ldr	r3, [fp, #-532]
	cmp	r2, r3
	bne	.L574
	ldr	r4, [fp, #-536]
	ldr	r0, [fp, #-528]
	cmp	r4, r0
	beq	.L478
.L574:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-35
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L478:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-36
	cfstr64	mvdx0, [fp, #-524]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-516]
	str	r1, [fp, #-512]
	ldr	r1, [fp, #-524]
	ldr	r2, [fp, #-516]
	cmp	r1, r2
	bne	.L575
	ldr	r3, [fp, #-520]
	ldr	r4, [fp, #-512]
	cmp	r3, r4
	beq	.L480
.L575:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-36
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L480:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-37
	cfstr64	mvdx0, [fp, #-508]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-500]
	str	r2, [fp, #-496]
	ldr	r2, [fp, #-508]
	ldr	r3, [fp, #-500]
	cmp	r2, r3
	bne	.L576
	ldr	r4, [fp, #-504]
	ldr	r0, [fp, #-496]
	cmp	r4, r0
	beq	.L482
.L576:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-37
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L482:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-38
	cfstr64	mvdx0, [fp, #-492]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-484]
	str	r1, [fp, #-480]
	ldr	r1, [fp, #-492]
	ldr	r2, [fp, #-484]
	cmp	r1, r2
	bne	.L577
	ldr	r3, [fp, #-488]
	ldr	r4, [fp, #-480]
	cmp	r3, r4
	beq	.L484
.L577:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-38
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L484:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-39
	cfstr64	mvdx0, [fp, #-476]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-468]
	str	r2, [fp, #-464]
	ldr	r2, [fp, #-476]
	ldr	r3, [fp, #-468]
	cmp	r2, r3
	bne	.L578
	ldr	r4, [fp, #-472]
	ldr	r0, [fp, #-464]
	cmp	r4, r0
	beq	.L486
.L578:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-39
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L486:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-40
	cfstr64	mvdx0, [fp, #-460]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-452]
	str	r1, [fp, #-448]
	ldr	r1, [fp, #-460]
	ldr	r2, [fp, #-452]
	cmp	r1, r2
	bne	.L579
	ldr	r3, [fp, #-456]
	ldr	r4, [fp, #-448]
	cmp	r3, r4
	beq	.L488
.L579:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-40
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L488:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-41
	cfstr64	mvdx0, [fp, #-444]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-436]
	str	r2, [fp, #-432]
	ldr	r2, [fp, #-444]
	ldr	r3, [fp, #-436]
	cmp	r2, r3
	bne	.L580
	ldr	r4, [fp, #-440]
	ldr	r0, [fp, #-432]
	cmp	r4, r0
	beq	.L490
.L580:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-41
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L490:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-42
	cfstr64	mvdx0, [fp, #-428]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-420]
	str	r1, [fp, #-416]
	ldr	r1, [fp, #-428]
	ldr	r2, [fp, #-420]
	cmp	r1, r2
	bne	.L581
	ldr	r3, [fp, #-424]
	ldr	r4, [fp, #-416]
	cmp	r3, r4
	beq	.L492
.L581:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-42
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L492:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-43
	cfstr64	mvdx0, [fp, #-412]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-404]
	str	r2, [fp, #-400]
	ldr	r2, [fp, #-412]
	ldr	r3, [fp, #-404]
	cmp	r2, r3
	bne	.L582
	ldr	r4, [fp, #-408]
	ldr	r0, [fp, #-400]
	cmp	r4, r0
	beq	.L494
.L582:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-43
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L494:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-44
	cfstr64	mvdx0, [fp, #-396]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-388]
	str	r1, [fp, #-384]
	ldr	r1, [fp, #-396]
	ldr	r2, [fp, #-388]
	cmp	r1, r2
	bne	.L583
	ldr	r3, [fp, #-392]
	ldr	r4, [fp, #-384]
	cmp	r3, r4
	beq	.L496
.L583:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-44
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L496:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-45
	cfstr64	mvdx0, [fp, #-380]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-372]
	str	r2, [fp, #-368]
	ldr	r2, [fp, #-380]
	ldr	r3, [fp, #-372]
	cmp	r2, r3
	bne	.L584
	ldr	r4, [fp, #-376]
	ldr	r0, [fp, #-368]
	cmp	r4, r0
	beq	.L498
.L584:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-45
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L498:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-46
	cfstr64	mvdx0, [fp, #-364]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-356]
	str	r1, [fp, #-352]
	ldr	r1, [fp, #-364]
	ldr	r2, [fp, #-356]
	cmp	r1, r2
	bne	.L585
	ldr	r3, [fp, #-360]
	ldr	r4, [fp, #-352]
	cmp	r3, r4
	beq	.L500
.L585:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-46
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L500:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-47
	cfstr64	mvdx0, [fp, #-348]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-340]
	str	r2, [fp, #-336]
	ldr	r2, [fp, #-348]
	ldr	r3, [fp, #-340]
	cmp	r2, r3
	bne	.L586
	ldr	r4, [fp, #-344]
	ldr	r0, [fp, #-336]
	cmp	r4, r0
	beq	.L502
.L586:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-47
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L502:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-48
	cfstr64	mvdx0, [fp, #-332]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-324]
	str	r1, [fp, #-320]
	ldr	r1, [fp, #-332]
	ldr	r2, [fp, #-324]
	cmp	r1, r2
	bne	.L587
	ldr	r3, [fp, #-328]
	ldr	r4, [fp, #-320]
	cmp	r3, r4
	beq	.L504
.L587:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-48
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L504:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-49
	cfstr64	mvdx0, [fp, #-316]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-308]
	str	r2, [fp, #-304]
	ldr	r2, [fp, #-316]
	ldr	r3, [fp, #-308]
	cmp	r2, r3
	bne	.L588
	ldr	r4, [fp, #-312]
	ldr	r0, [fp, #-304]
	cmp	r4, r0
	beq	.L506
.L588:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-49
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L506:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-50
	cfstr64	mvdx0, [fp, #-300]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-292]
	str	r1, [fp, #-288]
	ldr	r1, [fp, #-300]
	ldr	r2, [fp, #-292]
	cmp	r1, r2
	bne	.L589
	ldr	r3, [fp, #-296]
	ldr	r4, [fp, #-288]
	cmp	r3, r4
	beq	.L508
.L589:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-50
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L508:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-51
	cfstr64	mvdx0, [fp, #-284]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-276]
	str	r2, [fp, #-272]
	ldr	r2, [fp, #-284]
	ldr	r3, [fp, #-276]
	cmp	r2, r3
	bne	.L590
	ldr	r4, [fp, #-280]
	ldr	r0, [fp, #-272]
	cmp	r4, r0
	beq	.L510
.L590:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-51
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L510:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-52
	cfstr64	mvdx0, [fp, #-268]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-260]
	str	r1, [fp, #-256]
	ldr	r1, [fp, #-268]
	ldr	r2, [fp, #-260]
	cmp	r1, r2
	bne	.L591
	ldr	r3, [fp, #-264]
	ldr	r4, [fp, #-256]
	cmp	r3, r4
	beq	.L512
.L591:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-52
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L512:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-53
	cfstr64	mvdx0, [fp, #-252]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-244]
	str	r2, [fp, #-240]
	ldr	r2, [fp, #-252]
	ldr	r3, [fp, #-244]
	cmp	r2, r3
	bne	.L592
	ldr	r4, [fp, #-248]
	ldr	r0, [fp, #-240]
	cmp	r4, r0
	beq	.L514
.L592:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-53
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L514:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-54
	cfstr64	mvdx0, [fp, #-236]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-228]
	str	r1, [fp, #-224]
	ldr	r1, [fp, #-236]
	ldr	r2, [fp, #-228]
	cmp	r1, r2
	bne	.L593
	ldr	r3, [fp, #-232]
	ldr	r4, [fp, #-224]
	cmp	r3, r4
	beq	.L516
.L593:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-54
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L516:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-55
	cfstr64	mvdx0, [fp, #-220]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-212]
	str	r2, [fp, #-208]
	ldr	r2, [fp, #-220]
	ldr	r3, [fp, #-212]
	cmp	r2, r3
	bne	.L594
	ldr	r4, [fp, #-216]
	ldr	r0, [fp, #-208]
	cmp	r4, r0
	beq	.L518
.L594:
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-55
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L518:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-56
	cfstr64	mvdx0, [fp, #-204]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L605+4
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-196]
	str	r1, [fp, #-192]
	ldr	r1, [fp, #-204]
	ldr	r2, [fp, #-196]
	cmp	r1, r2
	bne	.L595
	ldr	r3, [fp, #-200]
	ldr	r4, [fp, #-192]
	cmp	r3, r4
	beq	.L520
.L595:
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-56
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L520:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-57
	cfstr64	mvdx0, [fp, #-188]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-180]
	str	r2, [fp, #-176]
	ldr	r2, [fp, #-188]
	ldr	r3, [fp, #-180]
	cmp	r2, r3
	bne	.L596
	ldr	r4, [fp, #-184]
	ldr	r0, [fp, #-176]
	cmp	r4, r0
	beq	.L522
.L596:
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-57
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L522:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-58
	cfstr64	mvdx0, [fp, #-172]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-164]
	str	r1, [fp, #-160]
	ldr	r1, [fp, #-172]
	ldr	r2, [fp, #-164]
	cmp	r1, r2
	bne	.L597
	ldr	r3, [fp, #-168]
	ldr	r4, [fp, #-160]
	cmp	r3, r4
	beq	.L524
.L597:
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-58
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L524:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-59
	cfstr64	mvdx0, [fp, #-156]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-148]
	str	r2, [fp, #-144]
	ldr	r2, [fp, #-156]
	ldr	r3, [fp, #-148]
	cmp	r2, r3
	bne	.L598
	ldr	r4, [fp, #-152]
	ldr	r0, [fp, #-144]
	cmp	r4, r0
	beq	.L526
.L598:
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-59
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L526:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-60
	cfstr64	mvdx0, [fp, #-140]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-132]
	str	r1, [fp, #-128]
	ldr	r1, [fp, #-140]
	ldr	r2, [fp, #-132]
	cmp	r1, r2
	bne	.L599
	ldr	r3, [fp, #-136]
	ldr	r4, [fp, #-128]
	cmp	r3, r4
	beq	.L528
.L599:
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-60
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L528:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-61
	cfstr64	mvdx0, [fp, #-124]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-116]
	str	r2, [fp, #-112]
	ldr	r2, [fp, #-124]
	ldr	r3, [fp, #-116]
	cmp	r2, r3
	bne	.L600
	ldr	r4, [fp, #-120]
	ldr	r0, [fp, #-112]
	cmp	r4, r0
	beq	.L530
.L600:
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-61
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L530:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-62
	cfstr64	mvdx0, [fp, #-108]
	ldr	r1, [fp, #-56]
	add	r1, r1, #1
	str	r1, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-100]
	str	r1, [fp, #-96]
	ldr	r1, [fp, #-108]
	ldr	r2, [fp, #-100]
	cmp	r1, r2
	bne	.L601
	ldr	r3, [fp, #-104]
	ldr	r4, [fp, #-96]
	cmp	r3, r4
	beq	.L532
.L601:
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-62
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L532:
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-63
	cfstr64	mvdx0, [fp, #-92]
	ldr	r0, [fp, #-56]
	add	r0, r0, #1
	str	r0, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r1-r2}
	str	r1, [fp, #-84]
	str	r2, [fp, #-80]
	ldr	r2, [fp, #-92]
	ldr	r3, [fp, #-84]
	cmp	r2, r3
	bne	.L602
	ldr	r4, [fp, #-88]
	ldr	r0, [fp, #-80]
	cmp	r4, r0
	beq	.L534
.L602:
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r3-r4}
	cfsh64	mvdx0, mvdx8, #0
	cfsh64	mvdx0, mvdx0, #-63
	cfstr64	mvdx0, [sp, #0]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r3
	mov	r3, r4
	bl	printf
.L534:
	cfmvr64l	r3, mvdx8
	cfmvr64h	r4, mvdx8
	mov	r1, r4, asr #31
	str	r1, [fp, #-76]
	mov	r2, r4, asr #31
	str	r2, [fp, #-72]
	sub	r3, fp, #76
	ldmia	r3, {r3-r4}
	str	r3, [fp, #-76]
	str	r4, [fp, #-72]
	ldr	r4, [fp, #-56]
	add	r4, r4, #1
	str	r4, [fp, #-56]
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	ldr	r1, [fp, #-76]
	ldr	r2, [fp, #-68]
	cmp	r1, r2
	bne	.L603
	ldr	r3, [fp, #-72]
	ldr	r4, [fp, #-64]
	cmp	r3, r4
	beq	.L604
.L603:
	ldr	r3, [fp, #-56]
	ldr	r2, .L608
	mov	r3, r3, asl #3
	add	r3, r2, r3
	ldmia	r3, {r5-r6}
	cfmvr64l	r1, mvdx8
	cfmvr64h	r2, mvdx8
	mov	r3, r2, asr #31
	mov	r4, r2, asr #31
	stmia	sp, {r3-r4}
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-56]
	mov	r2, r5
	mov	r3, r6
	bl	printf
.L604:
	cfldrd	mvd8, [fp, #-32]
	sub	sp, fp, #24
	ldmfd	sp, {r4, r5, r6, fp, sp, lr}
	bx	lr
.L609:
	.align	2
.L608:
	.word	aright
	.size	itest, .-itest
	.ident	"GCC: (GNU) 4.3.2"
	.section	.note.GNU-stack,"",%progbits