/*
 * Check code emitted for a 64-bit comparison.
 * 
 * The comparison should be done in pairs of ARM registers
 * because the Maverick's 64-bit comparison cmpdi only compares them
 * as signed, or as unsigned, according to a bit in its status register.
 * GCC expects a comparison to set the CCs to reflect both signed and unsigned
 * comparisons at once, to be selected by which conditional mode you then use.
 *
 * Setting the signed/unsigned bit in the status register is very painful, as
 * it has to be tranferred to ARM registers via a Maverick register, twiddled
 * and sent back the same way.
 */
typedef unsigned long long ui64;
typedef long long int i64;

i64 adddi3(i64 a, i64 b) { return a + b; }
i64 subdi3(i64 a, i64 b) { return a - b; }
i64 absdi2(i64 a)	 { return abs(a*a); }
i64 negdi2(i64 a)	 { return -(a*a); }