.cpu ep9312
	.fpu maverick
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 2
	.eabi_attribute 18, 4
	.file	"paranoia.c"
	.text
	.align	2
	.global	Sign
	.type	Sign, %function
Sign:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, .L7
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.+12
	bvs	.+8
	b	.L6
	mov	r0, #0
	ldr	r1, .L7+8
	bx	lr
.L6:
	mov	r0, #0
	ldr	r1, .L7+12
	bx	lr
.L8:
	.align	3
.L7:
	.word	0
	.word	0
	.word	1072693248
	.word	-1074790400
	.size	Sign, .-Sign
	.align	2
	.global	msglist
	.type	msglist, %function
msglist:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	mov	r3, r0
	ldr	r0, [r0, #0]
	stmfd	sp!, {r4, lr}
	cmp	r0, #0
	beq	.L12
	mov	r4, r3
.L11:
	bl	puts
	ldr	r0, [r4, #4]!
	cmp	r0, #0
	bne	.L11
.L12:
	ldmfd	sp!, {r4, lr}
	bx	lr
	.size	msglist, .-msglist
	.align	2
	.global	History
	.type	History, %function
History:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	ldr	r0, .L16
	b	msglist
.L17:
	.align	2
.L16:
	.word	hist.4624
	.size	History, .-History
	.align	2
	.global	Characteristics
	.type	Characteristics, %function
Characteristics:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	ldr	r0, .L20
	b	msglist
.L21:
	.align	2
.L20:
	.word	chars.4620
	.size	Characteristics, .-Characteristics
	.align	2
	.global	Heading
	.type	Heading, %function
Heading:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	ldr	r0, .L24
	b	msglist
.L25:
	.align	2
.L24:
	.word	head.4616
	.size	Heading, .-Heading
	.align	2
	.global	Instructions
	.type	Instructions, %function
Instructions:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
	ldr	r0, .L28
	b	msglist
.L29:
	.align	2
.L28:
	.word	instr.4612
	.size	Instructions, .-Instructions
	.section	.rodata.str1.4,"aMS",%progbits,1
	.align	2
.LC0:
	.ascii	"%s test appears to be inconsistent...\012\000"
	.align	2
.LC1:
	.ascii	"   PLEASE NOTIFY KARPINKSI!\000"
	.text
	.align	2
	.global	notify
	.type	notify, %function
notify:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	mov	r1, r0
	sub	sp, sp, #4
	ldr	r0, .L32
	bl	printf
	ldr	r0, .L32+4
	bl	puts
	add	sp, sp, #4
	ldr	lr, [sp], #4
	bx	lr
.L33:
	.align	2
.L32:
	.word	.LC0
	.word	.LC1
	.size	notify, .-notify
	.section	.rodata.str1.4
	.align	2
.LC2:
	.ascii	"Similar discrepancies have occurred %d times.\012\000"
	.text
	.align	2
	.global	PrintIfNPositive
	.type	PrintIfNPositive, %function
PrintIfNPositive:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	str	lr, [sp, #-4]!
	ldr	r3, .L37
	sub	sp, sp, #4
	ldr	r1, [r3, #0]
	cmp	r1, #0
	ldrgt	r0, .L37+4
	blgt	printf
.L36:
	add	sp, sp, #4
	ldr	lr, [sp], #4
	bx	lr
.L38:
	.align	2
.L37:
	.word	N
	.word	.LC2
	.size	PrintIfNPositive, .-PrintIfNPositive
	.section	.rodata.str1.4
	.align	2
.LC3:
	.ascii	"%s:  %s\000"
	.text
	.align	2
	.global	BadCond
	.type	BadCond, %function
BadCond:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, lr}
	ldr	r5, .L41
	ldr	r3, .L41+4
	ldr	ip, [r5, r0, asl #2]
	mov	r4, r0
	mov	r2, r1
	add	ip, ip, #1
	ldr	r1, [r3, r0, asl #2]
	sub	sp, sp, #4
	ldr	r0, .L41+8
	str	ip, [r5, r4, asl #2]
	bl	printf
	add	sp, sp, #4
	ldmfd	sp!, {r4, r5, lr}
	bx	lr
.L42:
	.align	2
.L41:
	.word	ErrCnt
	.word	msg.4415
	.word	.LC3
	.size	BadCond, .-BadCond
	.section	.rodata.str1.4
	.align	2
.LC4:
	.ascii	"WARNING:  computing\000"
	.align	2
.LC5:
	.ascii	"DEFECT\000"
	.align	2
.LC6:
	.ascii	"computing\012\000"
	.align	2
.LC7:
	.ascii	"\011(%.17e) ^ (%.17e)\012\000"
	.align	2
.LC8:
	.ascii	"\011yielded %.17e;\012\000"
	.align	2
.LC9:
	.ascii	"\011which compared unequal to correct %.17e ;\012\000"
	.align	2
.LC10:
	.ascii	"\011\011they differ by %.17e .\012\000"
	.global	__aeabi_dsub
	.text
	.align	2
	.global	IsYeqX
	.type	IsYeqX, %function
IsYeqX:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, r6, r7, r8, lr}
	ldr	r7, .L57
	ldr	r6, .L57+4
	cfldrd	mvd1, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	sub	sp, sp, #8
	beq	.L51
	ldr	r8, .L57+8
	ldr	r3, [r8, #0]
	cmp	r3, #0
	ble	.L55
.L46:
	ldr	r3, [r8, #0]
	add	r3, r3, #1
	str	r3, [r8, #0]
.L51:
	add	sp, sp, #8
	ldmfd	sp!, {r4, r5, r6, r7, r8, lr}
	bx	lr
.L55:
	ldr	r5, .L57+12
	ldr	r3, .L57+16
	cfldrd	mvd0, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	ldrne	r4, .L57+20
	bne	.L47
	mov	r0, r0	@ nop
	ldr	r4, .L57+20
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L56
	bvs	.L56
.L47:
	ldr	ip, .L57+24
	ldr	r0, .L57+28
	ldr	r3, [ip, #8]
	ldr	r1, .L57+32
	add	r3, r3, #1
	ldr	r2, .L57+36
	str	r3, [ip, #8]
	bl	printf
.L50:
	ldmia	r5, {r2-r3}	@ double
	ldr	r0, .L57+40
	ldmia	r4, {r4-r5}	@ double
	stmia	sp, {r4-r5}	@ double
	bl	printf
	ldmia	r7, {r2-r3}	@ double
	ldr	r0, .L57+44
	bl	printf
	ldmia	r6, {r2-r3}	@ double
	ldr	r0, .L57+48
	bl	printf
	ldmia	r6, {r2-r3}	@ double
	ldmia	r7, {r0-r1}	@ double
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L57+52
	bl	printf
	b	.L46
.L56:
	ldr	r0, .L57+56
	bl	puts
	b	.L50
.L58:
	.align	2
.L57:
	.word	Y
	.word	X
	.word	N
	.word	Z
	.word	Zero
	.word	Q
	.word	ErrCnt
	.word	.LC3
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.word	.LC4
	.size	IsYeqX, .-IsYeqX
	.section	.rodata.str1.4
	.align	2
.LC11:
	.ascii	".\000"
	.text
	.align	2
	.global	TstCond
	.type	TstCond, %function
TstCond:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, lr}
	cmp	r1, #0
	sub	sp, sp, #4
	mov	r5, r0
	bne	.L61
	ldr	r4, .L62
	ldr	r3, .L62+4
	ldr	ip, [r4, r0, asl #2]
	ldr	r1, [r3, r0, asl #2]
	add	ip, ip, #1
	ldr	r0, .L62+8
	str	ip, [r4, r5, asl #2]
	bl	printf
	ldr	r0, .L62+12
	bl	puts
.L61:
	add	sp, sp, #4
	ldmfd	sp!, {r4, r5, lr}
	bx	lr
.L63:
	.align	2
.L62:
	.word	ErrCnt
	.word	msg.4415
	.word	.LC3
	.word	.LC11
	.size	TstCond, .-TstCond
	.section	.rodata.str1.4
	.align	2
.LC12:
	.ascii	"\012Diagnosis resumes after milestone Number %d\000"
	.align	2
.LC13:
	.ascii	"          Page: %d\012\012\000"
	.text
	.align	2
	.global	Pause
	.type	Pause, %function
Pause:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, lr}
	ldr	r4, .L66
	ldr	r5, .L66+4
	sub	sp, sp, #4
	ldr	r1, [r4, #0]
	ldr	r0, .L66+8
	bl	printf
	ldr	r0, .L66+12
	ldr	r1, [r5, #0]
	bl	printf
	ldr	r3, [r4, #0]
	ldr	r2, [r5, #0]
	add	r3, r3, #1
	add	r2, r2, #1
	str	r3, [r4, #0]
	str	r2, [r5, #0]
	add	sp, sp, #4
	ldmfd	sp!, {r4, r5, lr}
	bx	lr
.L67:
	.align	2
.L66:
	.word	Milestone
	.word	PageNo
	.word	.LC12
	.word	.LC13
	.size	Pause, .-Pause
	.section	.rodata.str1.4
	.align	2
.LC14:
	.ascii	"Since comparison denies Z = 0, evaluating \000"
	.align	2
.LC15:
	.ascii	"(Z + Z) / Z should be safe.\000"
	.global	__aeabi_dadd
	.global	__aeabi_ddiv
	.align	2
.LC16:
	.ascii	"What the machine gets for (Z + Z) / Z is  %.17e .\012"
	.ascii	"\000"
	.align	2
.LC17:
	.ascii	"This is O.K., provided Over/Underflow\000"
	.align	2
.LC18:
	.ascii	" has NOT just been signaled.\000"
	.align	2
.LC19:
	.ascii	"This is a VERY SERIOUS DEFECT!\000"
	.align	2
.LC20:
	.ascii	"This is a DEFECT!\000"
	.align	2
.LC21:
	.ascii	"What prints as Z = \000"
	.align	2
.LC22:
	.ascii	"%.17e\012\011compares different from  \000"
	.align	2
.LC23:
	.ascii	"Z * 1 = %.17e \000"
	.align	2
.LC24:
	.ascii	"1 * Z == %g\012\000"
	.align	2
.LC25:
	.ascii	"Z / 1 = %.17e\012\000"
	.align	2
.LC26:
	.ascii	"Multiplication does not commute!\012\000"
	.align	2
.LC27:
	.ascii	"\011Comparison alleges that 1 * Z = %.17e\012\000"
	.align	2
.LC28:
	.ascii	"\011differs from Z * 1 = %.17e\012\000"
	.text
	.align	2
	.global	TstPtUf
	.type	TstPtUf, %function
TstPtUf:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, r6, lr}
	cfstrd	mvd9, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd8, [sp, #-8]!
	ldr	r3, .L101
	ldr	r2, .L101+4
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L101+8
	mov	r2, #0
	cfcmpd	r15, mvd1, mvd0
	str	r2, [r3, #0]
	bne	.L95
.L86:
	cfldrd	mvd8, [sp], #8
	cfldrd	mvd9, [sp], #8
	ldmfd	sp!, {r4, r5, r6, lr}
	bx	lr
.L95:
	ldr	r0, .L101+12
	bl	printf
	ldr	r0, .L101+16
	bl	puts
	ldr	r2, .L101+20
	ldr	r3, .L101+24
	ldr	r0, .L101+28
	str	r2, [r3, #0]
	bl	_setjmp
	cmp	r0, #0
	beq	.L96
.L71:
	ldr	ip, .L101+32
	ldr	r3, .L101+8
	ldr	r2, [ip, #4]
	mov	r1, #1
	add	r2, r2, #1
	ldr	r0, .L101+36
	str	r1, [r3, #0]
	str	r2, [ip, #4]
	bl	puts
.L74:
	ldr	r3, .L101
	ldr	r2, .L101+40
	cfldrd	mvd9, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd8, [r2, #0]
	ldr	ip, .L101+24
	mov	r4, #0
	str	r4, [ip, #0]
	ldr	lr, .L101+44
	ldr	ip, .L101+48
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfmuld	mvd8, mvd9, mvd8
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	cfstrd	mvd8, [lr, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd8, [ip, #0]
	bl	__aeabi_ddiv
	ldr	r3, .L101+52
	cfcmpd	r15, mvd9, mvd8
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	stmia	r3, {r0-r1}	@ double
	bne	.L77
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd9, mvd0
	bne	.L77
	ldr	r3, .L101+8
	ldr	r2, [r3, #0]
	cmp	r2, #0
	ble	.L86
.L84:
	bl	Pause
	b	.L86
.L77:
	ldr	r4, .L101+32
	ldr	r3, .L101+8
	ldr	ip, [r4, #8]
	mov	lr, #1
	add	ip, ip, #1
	ldr	r5, .L101
	str	lr, [r3, #0]
	ldr	r1, .L101+56
	ldr	r2, .L101+60
	str	ip, [r4, #8]
	ldr	r0, .L101+64
	bl	printf
	ldmia	r5, {r2-r3}	@ double
	ldr	r0, .L101+68
	bl	printf
	ldr	r3, .L101+44
	cfldrd	mvd0, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	bne	.L97
.L80:
	ldr	r3, .L101+48
	ldr	r2, .L101
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	beq	.L82
	mov	r0, r0	@ nop
	ldr	r3, .L101+44
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L98
.L82:
	ldr	r3, .L101+52
	ldr	r2, .L101
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	bne	.L99
.L83:
	ldr	r4, .L101+48
	ldr	r5, .L101+44
	cfldrd	mvd1, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r5, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L84
	ldr	ip, .L101+32
	ldr	r1, .L101+56
	ldr	r3, [ip, #8]
	ldr	r2, .L101+72
	add	r3, r3, #2
	str	r3, [ip, #8]
	ldr	r0, .L101+64
	bl	printf
	ldmia	r4, {r2-r3}	@ double
	ldr	r0, .L101+76
	bl	printf
	ldmia	r5, {r2-r3}	@ double
	ldr	r0, .L101+80
	bl	printf
	bl	Pause
	b	.L86
.L96:
	ldr	r3, .L101
	ldr	r6, .L101+84
	ldmia	r3, {r4-r5}	@ double
	mov	r2, r4
	mov	r3, r5
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_ddiv
	mov	r5, r1
	mov	r4, r0
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L101+88
	stmia	r6, {r4-r5}	@ double
	bl	printf
	ldr	r3, .L101+92
	cfldrd	mvd8, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd9, [r3, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dsub
	ldr	r3, .L101+96
	ldr	r2, .L101+100
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r2, #0]
	mov	r4, r0
	bic	r5, r1, #-2147483648
	cfmuld	mvd0, mvd0, mvd1
	cfmvdlr	mvd1, r4
	cfmvdhr	mvd1, r5
	cfcmpd	r15, mvd1, mvd0
	blt	.L100
	mov	r0, r0	@ nop
	ldr	r3, .L101+40
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	blt	.L71
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd9
	bvs	.L71
	ldr	ip, .L101+32
	ldr	r3, .L101+8
	ldr	r2, [ip, #8]
	mov	r1, #1
	add	r2, r2, #1
	str	r1, [r3, #0]
	str	r2, [ip, #8]
	ldr	r0, .L101+104
	bl	puts
	b	.L74
.L97:
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	ldr	r0, .L101+108
	bl	printf
	b	.L80
.L99:
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	ldr	r0, .L101+112
	bl	printf
	b	.L83
.L100:
	ldr	r0, .L101+116
	bl	printf
	ldr	r0, .L101+120
	bl	puts
	b	.L74
.L98:
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	ldr	r0, .L101+124
	bl	printf
	b	.L82
.L102:
	.align	2
.L101:
	.word	Z
	.word	Zero
	.word	N
	.word	.LC14
	.word	.LC15
	.word	sigfpe
	.word	sigsave
	.word	ovfl_buf
	.word	ErrCnt
	.word	.LC19
	.word	One
	.word	Random1
	.word	Random2
	.word	V9
	.word	.LC5
	.word	.LC21
	.word	.LC3
	.word	.LC22
	.word	.LC26
	.word	.LC27
	.word	.LC28
	.word	Q9
	.word	.LC16
	.word	Two
	.word	Radix
	.word	U2
	.word	.LC20
	.word	.LC23
	.word	.LC25
	.word	.LC17
	.word	.LC18
	.word	.LC24
	.size	TstPtUf, .-TstPtUf
	.align	2
	.global	SR3980
	.type	SR3980, %function
SR3980:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	ldr	sl, .L108
	ldr	r4, .L108+4
	ldr	fp, .L108+8
	ldr	r9, .L108+12
	ldr	r8, .L108+16
	ldr	r5, .L108+20
	ldr	r7, .L108+24
	sub	sp, sp, #4
	mov	r6, sl
.L105:
	ldr	r3, [r4, #0]
	ldmia	sl, {r0-r1}	@ double
	cfmv64lr	mvdx0, r3
	cfcvt32d	mvd0, mvfx0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfstrd	mvd0, [fp, #0]
	bl	pow
	stmia	r9, {r0-r1}	@ double
	bl	IsYeqX
	ldr	r3, [r4, #0]
	ldr	r2, [r8, #0]
	add	r3, r3, #1
	cmp	r3, r2
	str	r3, [r4, #0]
	bgt	.L106
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd2, [r7, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd1, mvd0
	cfcmpd	r15, mvd1, mvd2
	mov	r0, r0	@ nop
	cfstrd	mvd1, [r5, #0]
	blt	.L105
.L106:
	add	sp, sp, #4
	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	bx	lr
.L109:
	.align	2
.L108:
	.word	Z
	.word	I
	.word	Q
	.word	Y
	.word	M
	.word	X
	.word	W
	.size	SR3980, .-SR3980
	.align	2
	.global	SR3750
	.type	SR3750, %function
SR3750:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	cfstrd	mvd9, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd8, [sp, #-8]!
	ldr	r3, .L119
	ldr	r2, .L119+4
	cfldrd	mvd9, [r3, #0]
	ldmia	r2, {r4-r5}	@ double
	sub	sp, sp, #4
	mov	r2, r4
	mov	r3, r5
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dsub
	ldr	r8, .L119+8
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r8, {r6-r7}	@ double
	mov	r2, r4
	mov	r0, r6
	mov	r1, r7
	mov	r3, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	blt	.L115
	mov	r2, r6
	mov	r3, r7
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dsub
	ldr	ip, .L119+12
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	ip, {r0-r1}	@ double
	mov	r2, r6
	mov	r3, r7
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bvc	.L118
.L115:
	add	sp, sp, #4
	cfldrd	mvd8, [sp], #8
	cfldrd	mvd9, [sp], #8
	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	bx	lr
.L118:
	ldr	r3, .L119+16
	ldr	ip, .L119+20
	cfldrd	mvd0, [r3, #0]
	ldr	r2, [ip, #0]
	cfmuld	mvd0, mvd9, mvd0
	add	r2, r2, #1
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	str	r2, [ip, #0]
	bl	sqrt
	ldmia	r8, {r4-r5}	@ double
	ldr	ip, .L119+24
	mov	r2, r4
	mov	r3, r5
	ldmia	ip, {r8-r9}	@ double
	bl	__aeabi_dsub
	mov	r2, r4
	mov	r6, r0
	mov	r7, r1
	mov	r3, r5
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	ldr	r3, .L119+28
	ldr	ip, .L119+32
	cfldrd	mvd8, [r3, #0]
	mov	sl, r0
	mov	fp, r1
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	stmia	ip, {sl-fp}	@ double
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dsub
	ldr	ip, .L119+36
	mov	r2, r0
	mov	r3, r1
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_ddiv
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfmuld	mvd0, mvd8, mvd1
	cfmuld	mvd0, mvd1, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	bl	__aeabi_dsub
	ldr	ip, .L119+40
	mov	r6, r0
	mov	r7, r1
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	stmia	ip, {r6-r7}	@ double
	mov	r0, sl
	mov	r1, fp
	bl	__aeabi_dadd
	mov	r2, r6
	mov	r4, r0
	mov	r5, r1
	mov	r3, r7
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	mov	r3, r1
	mov	r2, r0
	mov	r1, r5
	mov	r0, r4
	bl	__aeabi_dadd
	ldr	r3, .L119+44
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	stmltia	r3, {r0-r1}	@ double
.L112:
	mov	r2, r6
	mov	r3, r7
	mov	r0, sl
	mov	r1, fp
	bl	__aeabi_dsub
	ldr	r2, .L119+48
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L119+52
	cfcmpd	r15, mvd1, mvd0
	stmia	r3, {r0-r1}	@ double
	stmvsia	r2, {r0-r1}	@ double
	b	.L115
.L120:
	.align	2
.L119:
	.word	X
	.word	Radix
	.word	Z2
	.word	W
	.word	D
	.word	I
	.word	Y
	.word	Half
	.word	Y2
	.word	X8
	.word	X2
	.word	MinSqEr
	.word	MaxSqEr
	.word	SqEr
	.size	SR3750, .-SR3750
	.section	.rodata.str1.4
	.align	2
.LC29:
	.ascii	"\012\000"
	.align	2
.LC30:
	.ascii	"sqrt( %.17e) - %.17e  = %.17e\012\000"
	.align	2
.LC31:
	.ascii	"\011instead of correct value 0 .\000"
	.text
	.align	2
	.global	SqXMinX
	.type	SqXMinX, %function
SqXMinX:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, r6, r7, r8, sl, lr}
	cfstrd	mvd9, [sp, #-8]!
	ldr	sl, .L133
	cfstrd	mvd8, [sp, #-8]!
	ldr	r3, .L133+4
	cfldrd	mvd9, [sl, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd8, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd9, mvd9
	sub	sp, sp, #20
	cfmuld	mvd8, mvd9, mvd8
	mov	r6, r0
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	bl	sqrt
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dsub
	ldr	r8, .L133+8
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	ldmia	r8, {r2-r3}	@ double
	bl	__aeabi_ddiv
	ldr	r3, .L133+12
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	ldr	r7, .L133+16
	cfcmpd	r15, mvd1, mvd0
	stmia	r7, {r0-r1}	@ double
	beq	.L128
	mov	r0, r0	@ nop
	ldr	r3, .L133+20
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	stmltia	r3, {r0-r1}	@ double
.L124:
	ldr	r3, .L133+24
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bvs	.L132
.L126:
	ldr	r4, .L133+28
	mov	r2, #0
	ldmia	r4, {r0-r1}	@ double
	ldr	r3, .L133+32
	bl	__aeabi_dadd
	ldr	r5, .L133+36
	ldr	r3, .L133+40
	ldr	ip, [r5, r6, asl #2]
	stmia	r4, {r0-r1}	@ double
	add	ip, ip, #1
	ldr	r1, [r3, r6, asl #2]
	ldr	r2, .L133+44
	str	ip, [r5, r6, asl #2]
	ldr	r0, .L133+48
	bl	printf
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd2, [r7, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd3, mvd0, mvd0
	cfmuld	mvd1, mvd1, mvd2
	cfmvrdl	r2, mvd3
	cfmvrdh	r3, mvd3
	ldr	r0, .L133+52
	cfstrd	mvd0, [sp, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd1, [sp, #8]
	bl	printf
	ldr	r0, .L133+56
	bl	puts
.L128:
	add	sp, sp, #20
	cfldrd	mvd8, [sp], #8
	cfldrd	mvd9, [sp], #8
	ldmfd	sp!, {r4, r5, r6, r7, r8, sl, lr}
	bx	lr
.L132:
	cfstrd	mvd1, [r3, #0]
	b	.L126
.L134:
	.align	2
.L133:
	.word	X
	.word	BInvrse
	.word	OneUlp
	.word	Zero
	.word	SqEr
	.word	MinSqEr
	.word	MaxSqEr
	.word	J
	.word	1072693248
	.word	ErrCnt
	.word	msg.4415
	.word	.LC29
	.word	.LC3
	.word	.LC30
	.word	.LC31
	.size	SqXMinX, .-SqXMinX
	.align	2
	.global	NewD
	.type	NewD, %function
NewD:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	cfstrd	mvd11, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd10, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd9, [sp, #-8]!
	ldr	r6, .L140
	cfstrd	mvd8, [sp, #-8]!
	ldr	r9, .L140+4
	ldr	r3, .L140+8
	cfldrd	mvd9, [r6, #0]
	ldmia	r9, {r7-r8}	@ double
	cfmvdlr	mvd0, r7
	cfmvdhr	mvd0, r8
	mov	r0, r0	@ nop
	cfldrd	mvd11, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd0, mvd9
	sub	sp, sp, #4
	cfmvrdl	r2, mvd11
	cfmvrdh	r3, mvd11
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_ddiv
	ldr	ip, .L140+12
	mov	r2, r0
	mov	r3, r1
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_dsub
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd11, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	ldr	sl, .L140+16
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfldrd	mvd10, [sl, #0]
	ldr	ip, .L140+20
	cfmuld	mvd0, mvd8, mvd10
	cfstrd	mvd8, [ip, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	ldr	fp, .L140+24
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd11
	cfmvrdh	r3, mvd11
	bl	__aeabi_ddiv
	cfldrd	mvd9, [fp, #0]
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd11
	cfmvrdh	r3, mvd11
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_ddiv
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfmuld	mvd0, mvd8, mvd8
	cfmuld	mvd0, mvd0, mvd1
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	ldr	r3, .L140+28
	stmia	r6, {r0-r1}	@ double
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd8, mvd0
	cfmuld	mvd8, mvd9, mvd8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	bl	__aeabi_dsub
	ldr	r3, .L140+32
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	stmia	sl, {r0-r1}	@ double
	bgt	.L136
	add	r3, r1, #-2147483648
	add	r2, r8, #-2147483648
	mov	r1, r0
	str	r3, [sl, #4]
	str	r2, [r9, #4]
	str	r1, [sl, #0]
	str	r7, [r9, #0]
.L136:
	cfmuld	mvd0, mvd11, mvd9
	cfstrd	mvd0, [fp, #0]
	add	sp, sp, #4
	cfldrd	mvd8, [sp], #8
	cfldrd	mvd9, [sp], #8
	cfldrd	mvd10, [sp], #8
	cfldrd	mvd11, [sp], #8
	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	bx	lr
.L141:
	.align	2
.L140:
	.word	Q
	.word	Z1
	.word	Radix
	.word	Half
	.word	Z
	.word	X
	.word	D
	.word	Two
	.word	Zero
	.size	NewD, .-NewD
	.align	2
	.global	Random
	.type	Random, %function
Random:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, lr}
	ldr	ip, .L144+8
	ldr	r4, .L144+12
	ldmia	ip, {r2-r3}	@ double
	cfstrd	mvd8, [sp, #-8]!
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_dadd
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfmuld	mvd0, mvd8, mvd8
	cfmuld	mvd0, mvd0, mvd0
	cfmuld	mvd8, mvd8, mvd0
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	floor
	cfldrd	mvd0, .L144
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfmuld	mvd8, mvd8, mvd0
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	stmia	r4, {r0-r1}	@ double
	cfldrd	mvd8, [sp], #8
	ldmfd	sp!, {r4, lr}
	bx	lr
.L145:
	.align	3
.L144:
	.word	-1998362383
	.word	1054144693
	.word	Random9
	.word	Random1
	.size	Random, .-Random
	.section	.rodata.str1.4
	.align	2
.LC32:
	.ascii	"Program is now RUNNING tests on small integers:\000"
	.align	2
.LC33:
	.ascii	"0+0 != 0, 1-1 != 0, 1 <= 0, or 1+1 != 2\000"
	.align	2
.LC34:
	.ascii	"Comparison alleges that -0.0 is Non-zero!\000"
	.align	2
.LC35:
	.ascii	"3 != 2+1, 4 != 3+1, 4+2*(-2) != 0, or 4-3-1 != 0\000"
	.align	2
.LC36:
	.ascii	"-1+1 != 0, (-1)+abs(1) != 0, or -1+(-1)*(-1) != 0\000"
	.align	2
.LC37:
	.ascii	"1/2 + (-1) + 1/2 != 0\000"
	.align	2
.LC38:
	.ascii	"9 != 3*3, 27 != 9*3, 32 != 8*4, or 32-27-4-1 != 0\000"
	.align	2
.LC39:
	.ascii	"5 != 4+1, 240/3 != 80, 240/4 != 60, or 240/5 != 48\000"
	.align	2
.LC40:
	.ascii	"-1, 0, 1/2, 1, 2, 3, 4, 5, 9, 27, 32 & 240 are O.K."
	.ascii	"\000"
	.align	2
.LC41:
	.ascii	"Searching for Radix and Precision.\000"
	.align	2
.LC42:
	.ascii	"Radix = %f .\012\000"
	.align	2
.LC43:
	.ascii	"Closest relative separation found is U1 = %.7e .\012"
	.ascii	"\012\000"
	.align	2
.LC44:
	.ascii	"Recalculating radix and precision\012 \000"
	.align	2
.LC45:
	.ascii	"confirms closest relative separation U1 .\000"
	.align	2
.LC46:
	.ascii	"gets better closest relative separation U1 = %.7e ."
	.ascii	"\012\000"
	.align	2
.LC47:
	.ascii	"Radix confirmed.\000"
	.align	2
.LC48:
	.ascii	"MYSTERY: recalculated Radix = %.7e .\012\000"
	.align	2
.LC49:
	.ascii	"Radix is too big: roundoff problems\000"
	.align	2
.LC50:
	.ascii	"Radix is not as good as 2 or 10\000"
	.align	2
.LC51:
	.ascii	"(1-U1)-1/2 < 1/2 is FALSE, prog. fails?\000"
	.align	2
.LC52:
	.ascii	"Comparison is fuzzy,X=1 but X-1/2-1/2 != 0\000"
	.align	2
.LC53:
	.ascii	"Precision cannot be characterized by an Integer num"
	.ascii	"ber\000"
	.align	2
.LC54:
	.ascii	"of significant digits but, by itself, this is a min"
	.ascii	"or flaw.\000"
	.align	2
.LC55:
	.ascii	"logarithmic encoding has precision characterized so"
	.ascii	"lely by U1.\000"
	.align	2
.LC56:
	.ascii	"The number of significant digits of the Radix is %f"
	.ascii	" .\012\000"
	.align	2
.LC57:
	.ascii	"Precision worse than 5 decimal figures  \000"
	.align	2
.LC58:
	.ascii	"SERIOUS DEFECT\000"
	.align	2
.LC59:
	.ascii	"Disagreements among the values X1, Y1, Z1,\012\000"
	.align	2
.LC60:
	.ascii	"respectively  %.7e,  %.7e,  %.7e,\012\000"
	.align	2
.LC61:
	.ascii	"are symptoms of inconsistencies introduced\000"
	.align	2
.LC62:
	.ascii	"by extra-precise evaluation of arithmetic subexpres"
	.ascii	"sions.\000"
	.align	2
.LC63:
	.ascii	"Possibly some part of this\000"
	.align	2
.LC64:
	.ascii	"That feature is not tested further by this program."
	.ascii	"\000"
	.align	2
.LC65:
	.ascii	"FAILURE\000"
	.align	2
.LC66:
	.ascii	"\000"
	.align	2
.LC67:
	.ascii	"Precision\000"
	.align	2
.LC68:
	.ascii	"\011U1 = %.7e, Z1 - U1 = %.7e\012\000"
	.align	2
.LC69:
	.ascii	"\011U2 = %.7e, Z2 - U2 = %.7e\012\000"
	.align	2
.LC70:
	.ascii	"Because of unusual Radix = %f\000"
	.align	2
.LC71:
	.ascii	", or exact rational arithmetic a result\000"
	.align	2
.LC72:
	.ascii	"Z1 = %.7e, or Z2 = %.7e \000"
	.align	2
.LC73:
	.ascii	"of an\012extra-precision\000"
	.align	2
.LC74:
	.ascii	"Some subexpressions appear to be calculated extra\000"
	.align	2
.LC75:
	.ascii	"precisely with about %g extra B-digits, i.e.\012\000"
	.align	2
.LC76:
	.ascii	"roughly %g extra significant decimals.\012\000"
	.align	2
.LC77:
	.ascii	"Subtraction is not normalized X=Y,X+Z != Y+Z!\000"
	.align	2
.LC78:
	.ascii	"Subtraction appears to be normalized, as it should "
	.ascii	"be.\000"
	.align	2
.LC79:
	.ascii	"\012Checking for guard digit in *, /, and -.\000"
	.align	2
.LC80:
	.ascii	"* lacks a Guard Digit, so 1*X != X\000"
	.align	2
.LC81:
	.ascii	"* gets too many final digits wrong.\012\000"
	.align	2
.LC82:
	.ascii	"Division lacks a Guard Digit, so error can exceed 1"
	.ascii	" ulp\012or  1/3  and  3/9  and  9/27 may disagree\000"
	.align	2
.LC83:
	.ascii	"Division lacks a Guard Digit, so X/1 != X\000"
	.align	2
.LC84:
	.ascii	"Computed value of 1/1.000..1 >= 1\000"
	.align	2
.LC85:
	.ascii	"* and/or / gets too many last digits wrong\000"
	.align	2
.LC86:
	.ascii	"- lacks Guard Digit, so cancellation is obscured\000"
	.align	2
.LC87:
	.ascii	"comparison alleges  (1-U1) < 1  although\012\000"
	.align	2
.LC88:
	.ascii	"  subtraction yields  (1-U1) - 1 = 0 , thereby viti"
	.ascii	"ating\000"
	.align	2
.LC89:
	.ascii	"  such precautions against division by zero as\000"
	.align	2
.LC90:
	.ascii	"  ...  if (X == 1.0) {.....} else {.../(X-1.0)...}\000"
	.align	2
.LC91:
	.ascii	"     *, /, and - appear to have guard digits, as th"
	.ascii	"ey should.\000"
	.align	2
.LC92:
	.ascii	"Checking rounding on multiply, divide and add/subtr"
	.ascii	"act.\000"
	.align	2
.LC93:
	.ascii	"X * (1/X) differs from 1\000"
	.align	2
.LC94:
	.ascii	"Multiplication appears to round correctly.\000"
	.align	2
.LC95:
	.ascii	"Multiplication appears to chop.\000"
	.align	2
.LC96:
	.ascii	"* is neither chopped nor correctly rounded.\000"
	.align	2
.LC97:
	.ascii	"Multiplication\000"
	.align	2
.LC98:
	.ascii	"Division appears to round correctly.\000"
	.align	2
.LC99:
	.ascii	"Division\000"
	.align	2
.LC100:
	.ascii	"Division appears to chop.\000"
	.align	2
.LC101:
	.ascii	"/ is neither chopped nor correctly rounded.\000"
	.align	2
.LC102:
	.ascii	"Radix * ( 1 / Radix ) differs from 1\000"
	.align	2
.LC103:
	.ascii	"Incomplete carry-propagation in Addition\000"
	.align	2
.LC104:
	.ascii	"Add/Subtract appears to be chopped.\000"
	.align	2
.LC105:
	.ascii	"Addition/Subtraction appears to round correctly.\000"
	.align	2
.LC106:
	.ascii	"Add/Subtract\000"
	.align	2
.LC107:
	.ascii	"Addition/Subtraction neither rounds nor chops.\000"
	.align	2
.LC108:
	.ascii	"FLAW\000"
	.align	2
.LC109:
	.ascii	"(X - Y) + (Y - X) is non zero!\012\000"
	.align	2
.LC110:
	.ascii	"Checking for sticky bit.\000"
	.align	2
.LC111:
	.ascii	"Sticky bit apparently used correctly.\000"
	.align	2
.LC112:
	.ascii	"Sticky bit used incorrectly or not at all.\000"
	.align	2
.LC113:
	.ascii	"lack(s) of guard digits or failure(s) to correctly "
	.ascii	"round or chop\012(noted above) count as one flaw in"
	.ascii	" the final tally below\000"
	.align	2
.LC114:
	.ascii	"Does Multiplication commute?  \000"
	.align	2
.LC115:
	.ascii	"Testing on %d random pairs.\012\000"
	.align	2
.LC116:
	.ascii	"X * Y == Y * X trial fails.\012\000"
	.align	2
.LC117:
	.ascii	"     No failures found in %d integer pairs.\012\000"
	.align	2
.LC118:
	.ascii	"\012Running test of square root(x).\000"
	.align	2
.LC119:
	.ascii	"Square root of 0.0, -0.0 or 1.0 wrong\000"
	.align	2
.LC120:
	.ascii	"Testing if sqrt(X * X) == X for %d Integers X.\012\000"
	.align	2
.LC121:
	.ascii	"Test for sqrt monotonicity.\000"
	.align	2
.LC122:
	.ascii	"sqrt has passed a test for Monotonicity.\000"
	.align	2
.LC123:
	.ascii	"sqrt(X) is non-monotonic for X near %.7e .\012\000"
	.align	2
.LC124:
	.ascii	"Testing whether sqrt is rounded or chopped.\000"
	.align	2
.LC125:
	.ascii	"Anomalous arithmetic with Integer < \000"
	.align	2
.LC126:
	.ascii	"Radix^Precision = %.7e\012\000"
	.align	2
.LC127:
	.ascii	" fails test whether sqrt rounds or chops.\000"
	.align	2
.LC128:
	.ascii	"Square root appears to be correctly rounded.\000"
	.align	2
.LC129:
	.ascii	"Square root appears to be chopped.\000"
	.align	2
.LC130:
	.ascii	"Square root is neither chopped nor correctly rounde"
	.ascii	"d.\000"
	.align	2
.LC131:
	.ascii	"Observed errors run from %.7e \000"
	.align	2
.LC132:
	.ascii	"to %.7e ulps.\012\000"
	.align	2
.LC133:
	.ascii	"sqrt gets too many last digits wrong\000"
	.align	2
.LC134:
	.ascii	"Testing powers Z^i for small Integers Z and i.\000"
	.align	2
.LC135:
	.ascii	"Errors like this may invalidate financial calculati"
	.ascii	"ons\000"
	.align	2
.LC136:
	.ascii	"\011involving interest rates.\000"
	.align	2
.LC137:
	.ascii	"... no discrepancies found.\000"
	.align	2
.LC138:
	.ascii	"Seeking Underflow thresholds UfThold and E0.\000"
	.align	2
.LC139:
	.ascii	"multiplication gets too many last digits wrong.\012"
	.ascii	"\000"
	.align	2
.LC140:
	.ascii	"Positive expressions can underflow to an\012\000"
	.align	2
.LC141:
	.ascii	"allegedly negative value\000"
	.align	2
.LC142:
	.ascii	"PseudoZero that prints out as: %g .\012\000"
	.align	2
.LC143:
	.ascii	"But -PseudoZero, which should be\000"
	.align	2
.LC144:
	.ascii	"positive, isn't; it prints out as  %g .\012\000"
	.align	2
.LC145:
	.ascii	"Underflow can stick at an allegedly positive\012\000"
	.align	2
.LC146:
	.ascii	"value PseudoZero that prints out as %g .\012\000"
	.align	2
.LC147:
	.ascii	"Products underflow at a higher\000"
	.align	2
.LC148:
	.ascii	" threshold than differences.\000"
	.align	2
.LC149:
	.ascii	"Difference underflows at a higher\000"
	.align	2
.LC150:
	.ascii	" threshold than products.\000"
	.align	2
.LC151:
	.ascii	"Smallest strictly positive number found is E0 = %g "
	.ascii	".\012\000"
	.align	2
.LC152:
	.ascii	"Either accuracy deteriorates as numbers\012\000"
	.align	2
.LC153:
	.ascii	"approach a threshold = %.17e\012\000"
	.align	2
.LC154:
	.ascii	" coming down from %.17e\012\000"
	.align	2
.LC155:
	.ascii	" or else multiplication gets too many last digits w"
	.ascii	"rong.\000"
	.align	2
.LC156:
	.ascii	"Underflow confuses Comparison, which alleges that\012"
	.ascii	"\000"
	.align	2
.LC157:
	.ascii	"Q == Y while denying that |Q - Y| == 0; these value"
	.ascii	"s\000"
	.align	2
.LC158:
	.ascii	"print out as Q = %.17e, Y = %.17e .\012\000"
	.align	2
.LC159:
	.ascii	"|Q - Y| = %.17e .\012\000"
	.align	2
.LC160:
	.ascii	"Underflow is gradual; it incurs Absolute Error =\000"
	.align	2
.LC161:
	.ascii	"(roundoff in UfThold) < E0.\000"
	.align	2
.LC162:
	.ascii	"Underflow / UfThold failed!\000"
	.align	2
.LC163:
	.ascii	"X = %.17e\012\011is not equal to Z = %.17e .\012\000"
	.align	2
.LC164:
	.ascii	"yet X - Z yields %.17e .\012\000"
	.align	2
.LC165:
	.ascii	"    Should this NOT signal Underflow, \000"
	.align	2
.LC166:
	.ascii	"this is a SERIOUS DEFECT\012that causes \000"
	.align	2
.LC167:
	.ascii	"confusion when innocent statements like\000"
	.align	2
.LC168:
	.ascii	"    if (X == Z)  ...  else\000"
	.align	2
.LC169:
	.ascii	"  ... (f(X) - f(Z)) / (X - Z) ...\000"
	.align	2
.LC170:
	.ascii	"encounter Division by Zero although actually\000"
	.align	2
.LC171:
	.ascii	"X / Z fails!\000"
	.align	2
.LC172:
	.ascii	"X / Z = 1 + %g .\012\000"
	.align	2
.LC173:
	.ascii	"The Underflow threshold is %.17e, %s\012\000"
	.align	2
.LC174:
	.ascii	" below which\000"
	.align	2
.LC175:
	.ascii	"calculation may suffer larger Relative error than \000"
	.align	2
.LC176:
	.ascii	"merely roundoff.\000"
	.align	2
.LC177:
	.ascii	"Range is too narrow; U1^%d Underflows.\012\000"
	.align	2
.LC178:
	.ascii	"Since underflow occurs below the threshold\000"
	.align	2
.LC179:
	.ascii	"UfThold = (%.17e) ^ (%.17e)\012only underflow \000"
	.align	2
.LC180:
	.ascii	"should afflict the expression\012\011(%.17e) ^ (%.1"
	.ascii	"7e);\012\000"
	.align	2
.LC181:
	.ascii	"actually calculating yields:\000"
	.align	2
.LC182:
	.ascii	"trap on underflow.\012\000"
	.align	2
.LC183:
	.ascii	" %.17e .\012\000"
	.align	2
.LC184:
	.ascii	"this is not between 0 and underflow\012\000"
	.align	2
.LC185:
	.ascii	"   threshold = %.17e .\012\000"
	.align	2
.LC186:
	.ascii	"This computed value is O.K.\000"
	.align	2
.LC187:
	.ascii	"Testing X^((X + 1) / (X - 1)) vs. exp(2) = %.17e as"
	.ascii	" X -> 1.\012\000"
	.align	2
.LC188:
	.ascii	"Calculated\000"
	.align	2
.LC189:
	.ascii	" %.17e for\012\000"
	.align	2
.LC190:
	.ascii	"\011(1 + (%.17e) ^ (%.17e);\012\000"
	.align	2
.LC191:
	.ascii	"\011differs from correct value by %.17e .\012\000"
	.align	2
.LC192:
	.ascii	"\011This much error may spoil financial\000"
	.align	2
.LC193:
	.ascii	"\011calculations involving tiny interest rates.\000"
	.align	2
.LC194:
	.ascii	"Accuracy seems adequate.\000"
	.align	2
.LC195:
	.ascii	"Testing powers Z^Q at four nearly extreme values.\000"
	.align	2
.LC196:
	.ascii	" ... no discrepancies found.\000"
	.align	2
.LC197:
	.ascii	"Searching for Overflow threshold:\000"
	.align	2
.LC198:
	.ascii	"This may generate an error.\000"
	.align	2
.LC199:
	.ascii	"Can `Z = -Y' overflow?\000"
	.align	2
.LC200:
	.ascii	"Trying it on Y = %.17e .\012\000"
	.align	2
.LC201:
	.ascii	"Seems O.K.\000"
	.align	2
.LC202:
	.ascii	"finds a \000"
	.align	2
.LC203:
	.ascii	"-(-Y) differs from Y.\012\000"
	.align	2
.LC204:
	.ascii	"overflow past %.17e\012\011shrinks to %.17e .\012\000"
	.align	2
.LC205:
	.ascii	"Overflow threshold is V  = %.17e .\012\000"
	.align	2
.LC206:
	.ascii	"Overflow saturates at V0 = %.17e .\012\000"
	.align	2
.LC207:
	.ascii	"There is no saturation value because the system tra"
	.ascii	"ps on overflow.\000"
	.align	2
.LC208:
	.ascii	"No Overflow should be signaled for V * 1 = %.17e\012"
	.ascii	"\000"
	.align	2
.LC209:
	.ascii	"                           nor for V / 1 = %.17e .\012"
	.ascii	"\000"
	.align	2
.LC210:
	.ascii	"Any overflow signal separating this * from the one\000"
	.align	2
.LC211:
	.ascii	"above is a DEFECT.\000"
	.align	2
.LC212:
	.ascii	"Comparisons involving \000"
	.align	2
.LC213:
	.ascii	"+-%g, +-%g\012and +-%g are confused by Overflow.\000"
	.align	2
.LC214:
	.ascii	"Comparison alleges that what prints as Z = %.17e\012"
	.ascii	"\000"
	.align	2
.LC215:
	.ascii	" is too far from sqrt(Z) ^ 2 = %.17e .\012\000"
	.align	2
.LC216:
	.ascii	"Comparison alleges that Z = %17e\012\000"
	.align	2
.LC217:
	.ascii	" is too far from sqrt(Z) ^ 2 (%.17e) .\012\000"
	.align	2
.LC218:
	.ascii	"Badly\000"
	.align	2
.LC219:
	.ascii	" unbalanced range; UfThold * V = %.17e\012\011%s\012"
	.ascii	"\000"
	.align	2
.LC220:
	.ascii	"is too far from 1.\012\000"
	.align	2
.LC221:
	.ascii	"  X / X  traps when X = %g\012\000"
	.align	2
.LC222:
	.ascii	"  X / X differs from 1 when X = %.17e\012\000"
	.align	2
.LC223:
	.ascii	"  instead, X / X - 1/2 - 1/2 = %.17e .\012\000"
	.align	2
.LC224:
	.ascii	"What message and/or values does Division by Zero pr"
	.ascii	"oduce?\000"
	.align	2
.LC225:
	.ascii	"    Trying to compute 1 / 0 produces ...\000"
	.align	2
.LC226:
	.ascii	"  %.7e .\012\000"
	.align	2
.LC227:
	.ascii	"\012    Trying to compute 0 / 0 produces ...\000"
	.align	2
.LC228:
	.ascii	"The number of  %-29s %d.\012\000"
	.align	2
.LC229:
	.ascii	"FAILUREs  encountered =\000"
	.align	2
.LC230:
	.ascii	"SERIOUS DEFECTs  discovered =\000"
	.align	2
.LC231:
	.ascii	"DEFECTs  discovered =\000"
	.align	2
.LC232:
	.ascii	"FLAWs  discovered =\000"
	.align	2
.LC233:
	.ascii	"The arithmetic diagnosed seems \000"
	.align	2
.LC234:
	.ascii	"Satisfactory though flawed.\000"
	.align	2
.LC235:
	.ascii	"The arithmetic diagnosed may be Acceptable\000"
	.align	2
.LC236:
	.ascii	"despite inconvenient Defects.\000"
	.align	2
.LC237:
	.ascii	"The arithmetic diagnosed has \000"
	.align	2
.LC238:
	.ascii	"unacceptable Serious Defects.\000"
	.align	2
.LC239:
	.ascii	"Potentially fatal FAILURE may have spoiled this\000"
	.align	2
.LC240:
	.ascii	" program's subsequent diagnoses.\000"
	.align	2
.LC241:
	.ascii	"No failures, defects nor flaws have been discovered"
	.ascii	".\000"
	.align	2
.LC242:
	.ascii	"The arithmetic diagnosed seems Satisfactory.\000"
	.align	2
.LC243:
	.ascii	"Rounding appears to conform to \000"
	.align	2
.LC244:
	.ascii	"the proposed IEEE standard P\000"
	.align	2
.LC245:
	.ascii	"754\000"
	.align	2
.LC246:
	.ascii	"854\000"
	.align	2
.LC247:
	.ascii	",\012except for possibly Double Rounding\000"
	.align	2
.LC248:
	.ascii	" during Gradual Underflow.\000"
	.align	2
.LC249:
	.ascii	"The arithmetic diagnosed appears to be Excellent!\000"
	.align	2
.LC250:
	.ascii	"\012A total of %d floating point exceptions were re"
	.ascii	"gistered.\012\000"
	.align	2
.LC251:
	.ascii	"END OF TEST.\000"
	.text
	.align	2
	.global	main
	.type	main, %function
main:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 72
	@ frame_needed = 0, uses_anonymous_args = 0
	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	cfstrd	mvd15, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd14, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd13, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd12, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd11, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd10, [sp, #-8]!
	mov	r0, r0	@ nop
	cfstrd	mvd9, [sp, #-8]!
	ldr	fp, .L943+204
	ldr	r4, .L943+16
	mov	r3, #0
	cfstrd	mvd8, [sp, #-8]!
	stmia	fp, {r3-r4}	@ double
	ldr	r2, [fp, #4]
	ldr	lr, .L943+20
	add	r2, r2, #-2147483648
	str	r2, [lr, #4]
	ldr	r2, .L943+24
	mov	ip, #1
	str	ip, [r2, #0]
	ldr	r2, .L943+180
	mov	r3, #0
	mov	r4, #0
	stmia	r2, {r3-r4}	@ double
	ldr	r2, .L943+164
	ldr	r4, .L943+28
	mov	r3, #0
	ldr	ip, .L943+148
	stmia	r2, {r3-r4}	@ double
	ldr	r4, .L943+32
	mov	r3, #0
	stmia	ip, {r3-r4}	@ double
	ldr	r6, .L943+36
	ldr	r3, .L943+40
	mov	r5, #0
	stmia	r3, {r5-r6}	@ double
	ldr	r8, .L943+44
	ldr	r3, .L943+240
	mov	r7, #0
	ldr	r2, .L943+48
	ldr	r4, .L943+52
	stmia	r3, {r7-r8}	@ double
	mov	r3, #0
	stmia	r2, {r3-r4}	@ double
	ldr	r6, .L943+56
	ldr	r3, .L943+60
	mov	r5, #0
	stmia	r3, {r5-r6}	@ double
	ldr	r8, .L943+64
	ldr	r3, .L943+188
	mov	r7, #0
	stmia	r3, {r7-r8}	@ double
	ldr	r5, .L943+68
	ldr	r3, .L943+72
	mov	r4, #0
	stmia	r3, {r4-r5}	@ double
	ldr	r2, .L943+212
	ldr	r4, .L943+76
	mov	r3, #0
	stmia	r2, {r3-r4}	@ double
	ldr	r6, .L943+80
	ldr	r2, .L943+84
	mov	r5, #0
	stmia	r2, {r5-r6}	@ double
	ldr	r9, .L943+88
	ldr	r6, [fp, #0]
	ldr	r7, .L943+92
	ldr	r5, .L943+252
	mov	r3, #0
	mov	sl, #0
	mov	r4, #1073741824
	sub	sp, sp, #92
	ldr	r1, .L943+96
	str	r6, [lr, #0]
	stmia	r5, {r3-r4}	@ double
	mov	r0, #8
	str	sl, [r9, #12]
	str	sl, [r7, #0]
	str	sl, [r9, #0]
	str	sl, [r9, #4]
	str	sl, [r9, #8]
	bl	signal
	ldr	r8, .L943+180
	bl	Instructions
	bl	Pause
	bl	Heading
	bl	Pause
	bl	Characteristics
	bl	Pause
	bl	History
	bl	Pause
	mov	r3, #7
	str	r3, [r7, #0]
	ldr	r0, .L943+100
	bl	puts
	cfldrd	mvd8, [r8, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	bne	.L147
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd9, [fp, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	beq	.L868
.L147:
	mov	r1, #0
.L151:
	ldr	r2, .L943+104
	mov	r0, #0
	bl	TstCond
	ldr	r2, .L943+180
	cfldrd	mvd0, .L943
	ldr	r3, [r2, #4]
	ldr	r4, [r2, #0]
	add	r5, r3, #-2147483648
	cfmvdlr	mvd1, r4
	cfmvdhr	mvd1, r5
	ldr	r3, .L943+108
	cfcmpd	r15, mvd1, mvd0
	stmia	r3, {r4-r5}	@ double
	bne	.L869
.L152:
	ldr	r3, .L943+252
	ldr	r2, .L943+204
	ldr	ip, .L943+164
	ldmia	r3, {r5-r6}	@ double
	ldmia	r2, {r7-r8}	@ double
	mov	r0, r5
	mov	r1, r6
	mov	r2, r7
	mov	r3, r8
	cfldrd	mvd8, [ip, #0]
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd8
	bne	.L154
	ldr	ip, .L943+148
	mov	r0, r7
	mov	r1, r8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfldrd	mvd9, [ip, #0]
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd9
	beq	.L870
.L154:
	mov	r1, #0
.L158:
	mov	r0, #0
	ldr	r2, .L943+112
	bl	TstCond
	ldr	r3, .L943+204
	ldr	ip, .L943+20
	ldmia	r3, {r4-r5}	@ double
	mov	r0, #0
	mov	r1, #0
	mov	r2, r4
	mov	r3, r5
	cfldrd	mvd8, [ip, #0]
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd8
	bne	.L159
	ldr	ip, .L943+180
	mov	r0, r4
	mov	r1, r5
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfldrd	mvd9, [ip, #0]
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd9
	beq	.L871
.L159:
	mov	r1, #0
.L163:
	mov	r0, #0
	ldr	r2, .L943+116
	bl	TstCond
	ldr	r3, .L943+212
	ldr	r1, .L943+20
	ldmia	r3, {r4-r5}	@ double
	ldmia	r1, {r2-r3}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r3, r1
	mov	r2, r0
	mov	r1, r5
	mov	r0, r4
	bl	__aeabi_dadd
	ldr	r4, .L943+180
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	movne	r1, #0
	moveq	r1, #1
	ldr	r2, .L943+120
	mov	r0, #0
	bl	TstCond
	ldr	r3, .L943+164
	mov	r2, #10
	cfldrd	mvd1, [r3, #0]
	ldr	r3, .L943+48
	cfmuld	mvd0, mvd1, mvd1
	cfldrd	mvd2, [r3, #0]
	ldr	r3, .L943+92
	cfcmpd	r15, mvd0, mvd2
	str	r2, [r3, #0]
	bne	.L164
	mov	r0, r0	@ nop
	ldr	r3, .L943+60
	cfmuld	mvd0, mvd1, mvd2
	cfldrd	mvd10, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd10
	beq	.L872
.L164:
	mov	r1, #0
.L169:
	mov	r0, #0
	ldr	r2, .L943+124
	bl	TstCond
	ldr	r3, .L943+148
	ldr	r1, .L943+204
	cfldrd	mvd8, [r3, #0]
	ldmia	r1, {r2-r3}	@ double
	ldr	ip, .L943+40
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfldrd	mvd9, [ip, #0]
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd9
	bne	.L170
	mov	r0, r0	@ nop
	ldr	r3, .L943+164
	cfmuld	mvd0, mvd8, mvd9
	cfldrd	mvd11, [r3, #0]
	ldr	r3, .L943+72
	cfmuld	mvd0, mvd0, mvd11
	cfldrd	mvd10, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd8, mvd0
	cfcmpd	r15, mvd0, mvd10
	beq	.L873
.L170:
	mov	r1, #0
.L175:
	ldr	r2, .L943+128
	mov	r0, #0
	bl	TstCond
	ldr	r3, .L943+88
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L874
.L176:
	ldr	r0, .L943+132
	bl	puts
	ldr	fp, .L943+204
	ldr	r2, .L943+208
	ldmia	fp, {r3-r4}	@ double
	stmia	r2, {r3-r4}	@ double
	ldr	sl, .L943+108
	ldr	r9, .L943+180
	ldr	r8, .L943+20
	mov	r7, r2
	mov	r6, fp
.L177:
	ldmia	r7, {r0-r1}	@ double
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	ldmia	r6, {r2-r3}	@ double
	mov	r4, r0
	mov	r5, r1
	stmia	r7, {r4-r5}	@ double
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	ldmia	r6, {r2-r3}	@ double
	mov	r4, r0
	mov	r5, r1
	stmia	sl, {r4-r5}	@ double
	bl	__aeabi_dsub
	ldmia	r8, {r2-r3}	@ double
	bic	ip, r1, #-2147483648
	mov	r1, ip
	bl	__aeabi_dadd
	cfldrd	mvd1, [r9, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd1
	blt	.L177
	ldr	r1, .L943+184
	ldr	r2, .L943+152
	ldmia	fp, {r3-r4}	@ double
	cfstrd	mvd1, [r2, #0]
	stmia	r1, {r3-r4}	@ double
	ldr	sl, .L943+248
	ldr	r7, .L943+208
	ldr	r8, .L943+180
	mov	r6, r1
.L178:
	ldmia	r6, {r2-r3}	@ double
	ldmia	r7, {r0-r1}	@ double
	bl	__aeabi_dadd
	mov	r4, r0
	mov	r5, r1
	ldmia	r6, {r0-r1}	@ double
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	ldmia	r7, {r2-r3}	@ double
	stmia	r6, {r0-r1}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd0
	stmia	sl, {r0-r1}	@ double
	beq	.L178
	mov	r0, r0	@ nop
	ldr	r3, .L943+252
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	ldrvs	r2, .L943+204
	ldmvsia	r2, {r3-r4}	@ double
	stmvsia	sl, {r3-r4}	@ double
.L179:
	ldr	r5, .L943+248
	ldr	r0, .L943+136
	ldmia	r5, {r2-r3}	@ double
	bl	printf
	cfldrd	mvd1, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, .L943+8
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L181
	ldr	r1, .L943+208
	ldr	r2, .L943+204
	ldr	r8, .L943+152
	ldmia	r2, {r3-r4}	@ double
	stmia	r1, {r3-r4}	@ double
	ldr	r9, .L943+184
	mov	r6, r2
	mov	r7, r1
	mov	sl, r5
	b	.L944
.L945:
	.align	3
.L943:
	.word	0
	.word	0
	.word	0
	.word	1072693248
	.word	1072693248
	.word	MinusOne
	.word	PageNo
	.word	1074266112
	.word	1074790400
	.word	1075052544
	.word	Five
	.word	1075838976
	.word	Nine
	.word	1075970048
	.word	1077608448
	.word	TwentySeven
	.word	1077936128
	.word	1080950784
	.word	TwoForty
	.word	1071644672
	.word	1073217536
	.word	OneAndHalf
	.word	ErrCnt
	.word	Milestone
	.word	sigfpe
	.word	.LC32
	.word	.LC33
	.word	Z
	.word	.LC35
	.word	.LC36
	.word	.LC37
	.word	.LC38
	.word	.LC39
	.word	.LC41
	.word	.LC42
	.word	.LC43
	.word	.LC44
	.word	Four
	.word	Precision
	.word	E9
	.word	E3
	.word	Three
	.word	F6
	.word	Third
	.word	X
	.word	Zero
	.word	Y
	.word	ThirtyTwo
	.word	E1
	.word	.LC45
	.word	U1
	.word	One
	.word	W
	.word	Half
	.word	F9
	.word	U2
	.word	1065646817
	.word	1202590843
	.word	E0
	.word	.LC47
	.word	Eight
	.word	.LC49
	.word	Radix
	.word	Two
.L944:
.L183:
	ldmia	r8, {r0-r1}	@ double
	ldmia	r6, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldmia	r6, {r2-r3}	@ double
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd8, [r7, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd8, mvd0
	stmia	r8, {r0-r1}	@ double
	cfstrd	mvd8, [r7, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	stmia	r9, {r4-r5}	@ double
	bl	__aeabi_dsub
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd0
	beq	.L183
.L181:
	ldr	ip, .L943+208
	ldr	fp, .L943+204
	ldmia	ip, {r2-r3}	@ double
	ldmia	fp, {r0-r1}	@ double
	bl	__aeabi_ddiv
	ldr	r9, .L943+248
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r9, #0]
	ldr	r4, .L943+220
	ldr	sl, .L943+200
	cfmuld	mvd0, mvd1, mvd0
	cfstrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd1, [sl, #0]
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L943+140
	bl	printf
	ldr	r0, .L943+144
	bl	printf
	ldmia	r9, {r5-r6}	@ double
	ldmia	sl, {r7-r8}	@ double
	cfldrd	mvd8, [r4, #0]
	ldr	r1, .L943+164
	ldr	ip, .L943+148
	ldr	r4, .L943+232
	ldmia	r1, {r2-r3}	@ double
	stmia	r4, {r5-r6}	@ double
	ldmia	ip, {r0-r1}	@ double
	ldr	r4, .L943+192
	ldr	ip, .L943+152
	stmia	r4, {r7-r8}	@ double
	ldmia	ip, {r5-r6}	@ double
	ldr	r4, .L943+156
	ldr	ip, .L943+160
	cfstrd	mvd8, [r4, #0]
	stmia	ip, {r5-r6}	@ double
	bl	__aeabi_ddiv
	ldmia	fp, {r2-r3}	@ double
	bl	__aeabi_dsub
	ldr	ip, .L943+212
	mov	r4, r0
	mov	r5, r1
	mov	r2, r0
	mov	r3, r1
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r3, r5
	mov	r2, r4
	bl	__aeabi_dsub
	mov	r4, r0
	bic	r5, r1, #-2147483648
	cfmvdlr	mvd2, r4
	cfmvdhr	mvd2, r5
	ldr	r3, .L943+176
	cfcmpd	r15, mvd2, mvd8
	stmia	r3, {r4-r5}	@ double
	bge	.L184
	mov	r0, r0	@ nop
	cfstrd	mvd8, [r3, #0]
.L184:
	ldr	r5, .L943+176
	ldr	sl, .L943+220
	ldr	r8, .L943+212
	ldr	r7, .L943+188
	ldr	r4, .L943+204
	ldr	r6, .L943+180
.L825:
	cfldrd	mvd8, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd8, mvd1
	cfmuld	mvd1, mvd8, mvd1
	cfmuld	mvd0, mvd8, mvd0
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfstrd	mvd8, [sl, #0]
	bl	__aeabi_dadd
	ldmia	r4, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldmia	r4, {r2-r3}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd8
	stmia	r5, {r0-r1}	@ double
	beq	.L186
	bvs	.L186
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bgt	.L825
.L186:
	ldr	ip, .L943+252
	ldr	r1, .L943+164
	ldr	r8, .L943+212
	ldmia	r1, {r2-r3}	@ double
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_ddiv
	ldmia	r8, {r2-r3}	@ double
	bl	__aeabi_dsub
	ldr	ip, .L943+168
	mov	r4, r0
	mov	r5, r1
	stmia	ip, {r4-r5}	@ double
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	ldmia	r8, {r2-r3}	@ double
	ldr	ip, .L943+172
	mov	r6, r0
	mov	r7, r1
	stmia	ip, {r6-r7}	@ double
	bl	__aeabi_dsub
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dadd
	ldr	r3, .L943+200
	mov	r4, r0
	bic	r5, r1, #-2147483648
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r4
	cfmvdhr	mvd1, r5
	ldr	r2, .L943+176
	cfcmpd	r15, mvd1, mvd0
	stmia	r2, {r4-r5}	@ double
	bge	.L188
	mov	r0, r0	@ nop
	cfstrd	mvd0, [r2, #0]
.L188:
	ldr	r6, .L943+176
	ldr	fp, .L943+200
	ldr	sl, .L943+212
	ldr	r9, .L943+188
	ldr	r7, .L943+184
	ldr	r8, .L943+180
.L826:
	cfldrd	mvd9, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd8, [sl, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd9, mvd0
	cfmuld	mvd1, mvd9, mvd8
	cfmuld	mvd0, mvd9, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	cfstrd	mvd9, [fp, #0]
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	stmia	r7, {r4-r5}	@ double
	bl	__aeabi_dadd
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd9
	stmia	r6, {r0-r1}	@ double
	beq	.L190
	bvs	.L190
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bgt	.L826
.L190:
	ldr	r3, .L943+192
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd9
	bne	.L827
	ldr	r0, .L943+196
	bl	puts
.L194:
	ldr	r6, .L943+200
	ldr	ip, .L943+204
	ldmia	r6, {r2-r3}	@ double
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_ddiv
	ldmia	r6, {r2-r3}	@ double
	ldr	ip, .L943+208
	stmia	ip, {r0-r1}	@ double
	ldr	r1, .L943+212
	ldmia	r1, {r4-r5}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	ldmia	r6, {r2-r3}	@ double
	ldr	ip, .L943+216
	ldr	r4, .L943+220
	stmia	ip, {r0-r1}	@ double
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_ddiv
	ldr	r3, .L943+224
	ldr	r2, .L943+228
	bl	__aeabi_dadd
	bl	floor
	ldr	r3, .L943+232
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L943+248
	cfcmpd	r15, mvd1, mvd0
	stmia	r3, {r0-r1}	@ double
	bne	.L828
	ldr	r0, .L943+236
	bl	puts
.L197:
	ldr	r3, .L943+240
	ldmia	r3, {r0-r1}	@ double
	mov	r3, r1
	mov	r2, r0
	bl	__aeabi_dadd
	ldr	r3, .L943+248
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	mov	r1, #1
	beq	.L198
	bvs	.L198
	sub	r1, r1, #1
.L198:
	ldr	r2, .L943+244
	mov	r0, #2
	bl	TstCond
	ldr	r3, .L943+248
	ldr	r2, .L943+252
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	beq	.L199
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, .L946
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L875
.L199:
	mov	r1, #1
.L200:
	ldr	r6, .L946+216
	mov	r0, #3
	ldr	r2, .L946+8
	bl	TstCond
	cfldrd	mvd8, [r6, #0]
	ldr	ip, .L946+240
	ldr	r5, .L946+160
	mov	r4, #20
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	ldmia	r5, {r0-r1}	@ double
	str	r4, [ip, #0]
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	movvc	r1, #0
	movvs	r1, #1
	mov	r0, #0
	ldr	r2, .L946+12
	bl	TstCond
	ldmia	r6, {r2-r3}	@ double
	cfldrd	mvd8, [r5, #0]
	ldr	ip, .L946+264
	ldr	r4, .L946+16
	mov	r7, #1
	cfstrd	mvd8, [ip, #0]
	str	r7, [r4, #0]
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	ldmia	r6, {r2-r3}	@ double
	ldr	ip, .L946+232
	mov	r4, r0
	mov	r5, r1
	stmia	ip, {r4-r5}	@ double
	bl	__aeabi_dsub
	ldr	r3, .L946+248
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L946+220
	cfcmpd	r15, mvd8, mvd0
	stmia	r3, {r0-r1}	@ double
	movne	r1, r7
	bne	.L203
	mov	r0, r0	@ nop
	ldr	r3, .L946+228
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	movne	r1, #0
	moveq	r1, #1
.L203:
	ldr	r8, .L946+248
	ldr	r6, .L946+244
	mov	r0, #0
	ldr	r2, .L946+20
	bl	TstCond
	ldmia	r6, {r2-r3}	@ double
	ldmia	r8, {r0-r1}	@ double
	bl	__aeabi_dadd
	ldmia	r8, {r2-r3}	@ double
	ldr	ip, .L946+16
	mov	r4, #0
	ldr	r7, .L946+212
	str	r4, [ip, #0]
	ldr	sl, .L946+264
	ldr	ip, .L946+240
	mov	r5, #25
	str	r5, [ip, #0]
	stmia	sl, {r0-r1}	@ double
	ldmia	r7, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldmia	r6, {r2-r3}	@ double
	bl	__aeabi_dsub
	ldmia	r8, {r2-r3}	@ double
	bl	__aeabi_dadd
	cfldrd	mvd1, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r8, #0]
	ldr	r3, .L946+148
	cfcmpd	r15, mvd1, mvd0
	stmia	r3, {r0-r1}	@ double
	bne	.L876
.L204:
	ldr	r3, .L946+24
	cfldrd	mvd8, [r3, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bne	.L209
	ldr	r3, .L946+212
	ldr	r2, .L946+248
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L209
	ldr	r3, .L946+212
	ldr	r2, .L946+248
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L830
.L909:
	ldr	r0, .L946+28
	bl	puts
.L214:
	ldr	r3, .L946+108
	ldr	r2, .L946+244
	cfldrd	mvd2, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L946+32
	cfmuld	mvd0, mvd2, mvd0
	ldr	sl, .L946+248
	cfmuld	mvd2, mvd2, mvd0
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [sl, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd2, mvd2, mvd0
	cfcmpd	r15, mvd2, mvd1
	movge	r1, #0
	movlt	r1, #1
	mov	r0, #1
	ldr	r2, .L946+36
	bl	TstCond
	ldmia	sl, {r8-r9}	@ double
	ldr	ip, .L946+240
	ldr	r3, .L946+40
	mov	r5, #30
	ldr	r4, .L946+192
	str	r5, [ip, #0]
	ldmia	r3, {r6-r7}	@ double
	mov	r0, r8
	mov	r2, r6
	mov	r3, r7
	mov	r1, r9
	bl	__aeabi_ddiv
	cfldrd	mvd8, [r4, #0]
	mov	r5, r1
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r4, r0
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_ddiv
	mov	r2, r8
	mov	r3, r9
	bl	__aeabi_dsub
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd8, mvd8, mvd0
	mov	r3, r5
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	mov	r2, r4
	bl	__aeabi_dsub
	ldr	r3, .L946+264
	bic	ip, r1, #-2147483648
	ldr	fp, .L946+44
	ldr	r7, .L946+216
	ldr	r8, .L946+48
	ldr	r9, .L946+228
	stmia	r3, {r0, ip}	@ phole stm
	mov	r6, r3
.L216:
	cfldrd	mvd8, [r6, #0]
	ldmia	sl, {r4-r5}	@ double
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd8, mvd1
	cfmuld	mvd1, mvd8, mvd1
	cfmuld	mvd0, mvd8, mvd0
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfstrd	mvd8, [fp, #0]
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd8
	stmia	r6, {r0-r1}	@ double
	beq	.L215
	bvs	.L215
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bgt	.L216
.L215:
	ldr	r3, .L946+192
	ldr	r2, .L946+40
	cfldrd	mvd8, [r3, #0]
	ldmia	r2, {r6-r7}	@ double
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	mov	r2, r6
	mov	r3, r7
	bl	__aeabi_ddiv
	ldr	r8, .L946+176
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r4, r0
	mov	r5, r1
	ldmia	r8, {r0-r1}	@ double
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	r9, .L946+248
	mov	r2, r6
	mov	r3, r7
	ldmia	r9, {r0-r1}	@ double
	cfmuld	mvd8, mvd8, mvd0
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	bic	r7, r1, #-2147483648
	mov	ip, r0
	mov	r5, ip
	mov	r4, r7
	ldr	r3, .L946+264
	mov	r9, r0
	b	.L947
.L948:
	.align	3
.L946:
	.word	0
	.word	1076101120
	.word	.LC50
	.word	.LC51
	.word	I
	.word	.LC52
	.word	Precision
	.word	.LC55
	.word	TwoForty
	.word	.LC57
	.word	Four
	.word	Z2
	.word	ThirtyTwo
	.word	ErrCnt
	.word	X1
	.word	.LC58
	.word	.LC59
	.word	.LC3
	.word	Z1
	.word	.LC60
	.word	.LC61
	.word	.LC62
	.word	.LC63
	.word	.LC64
	.word	.LC79
	.word	.LC80
	.word	.LC81
	.word	Nine
	.word	TwentySeven
	.word	.LC82
	.word	GDiv
	.word	.LC83
	.word	.LC84
	.word	R
	.word	StickyBit
	.word	U1
	.word	.LC85
	.word	BMinusU2
	.word	GAddSub
	.word	.LC86
	.word	F9
	.word	GMult
	.word	.LC92
	.word	RAddSub
	.word	Two
	.word	RMult
	.word	RDiv
	.word	RadixD2
	.word	Three
	.word	A1
	.word	.LC93
	.word	AInvrse
	.word	Done
	.word	Radix
	.word	Half
	.word	Z
	.word	T
	.word	Zero
	.word	Y
	.word	.LC96
	.word	Milestone
	.word	U2
	.word	One
	.word	Y2
	.word	Y1
	.word	OneAndHalf
	.word	X
.L947:
	ldr	ip, .L946+220
	mov	r0, r5
	mov	r1, r4
	ldr	r2, .L946+232
	mov	sl, r7
	mov	r8, r4
	mov	r7, r5
	stmia	r3, {r0-r1}	@ double
	stmia	r2, {r7-r8}	@ double
	stmia	ip, {r9-sl}	@ double
	ldr	fp, .L946+72
	ldr	sl, .L946+48
	ldr	r9, .L946+228
	ldr	r7, .L946+248
	ldr	r8, .L946+176
	mov	r6, ip
.L219:
	cfldrd	mvd8, [r6, #0]
	ldmia	r8, {r2-r3}	@ double
	ldmia	r7, {r0-r1}	@ double
	cfstrd	mvd8, [fp, #0]
	bl	__aeabi_ddiv
	ldr	ip, .L946+216
	cfldrd	mvd1, [sl, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [ip, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd8, mvd1
	cfmuld	mvd1, mvd8, mvd1
	cfmuld	mvd0, mvd8, mvd0
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd8
	stmia	r6, {r0-r1}	@ double
	beq	.L801
	bvs	.L801
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bgt	.L219
.L801:
	ldr	r6, .L946+232
	ldr	fp, .L946+256
	ldr	r7, .L946+216
	ldr	r8, .L946+48
	ldr	sl, .L946+264
	ldr	r9, .L946+228
.L831:
	cfldrd	mvd9, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd8, [r7, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd9, mvd0
	cfmuld	mvd1, mvd9, mvd8
	cfmuld	mvd0, mvd9, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	cfstrd	mvd9, [fp, #0]
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd9
	stmia	r6, {r0-r1}	@ double
	beq	.L221
	bvs	.L221
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bgt	.L831
	mov	r0, r0	@ nop
.L221:
	cfldrd	mvd8, [sl, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r7, #0]
	ldr	ip, .L946+56
	cfmuld	mvd1, mvd8, mvd1
	cfmuld	mvd1, mvd8, mvd1
	cfmuld	mvd0, mvd8, mvd0
	ldr	lr, .L946+160
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	ldmia	lr, {r4-r5}	@ double
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfstrd	mvd8, [ip, #0]
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd8
	stmia	sl, {r0-r1}	@ double
	beq	.L223
	bvs	.L223
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bgt	.L831
.L223:
	ldr	r3, .L946+256
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd8
	bne	.L225
	mov	r0, r0	@ nop
	ldr	r3, .L946+72
	cfldrd	mvd2, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd2, mvd8
	beq	.L832
.L225:
	ldr	ip, .L946+52
	ldr	r8, .L946+56
	ldr	r3, [ip, #4]
	ldr	r1, .L946+60
	add	r3, r3, #1
	str	r3, [ip, #4]
	ldr	r2, .L946+64
	ldr	r0, .L946+68
	ldr	sl, .L946+256
	ldr	r9, .L946+72
	bl	printf
	ldmia	r8, {r2-r3}	@ double
	ldmia	sl, {r4-r5}	@ double
	ldmia	r9, {r6-r7}	@ double
	ldr	r0, .L946+76
	stmia	sp, {r4-r5}	@ double
	str	r6, [sp, #8]
	str	r7, [sp, #12]
	bl	printf
	ldr	r0, .L946+80
	bl	puts
	ldr	r0, .L946+84
	bl	puts
	ldr	r0, .L946+88
	bl	notify
	ldr	r3, .L946+140
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	mov	r0, r0	@ nop
	beq	.L240
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	beq	.L240
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L229
.L240:
	ldr	r0, .L946+92
	bl	puts
.L229:
	bl	Pause
	ldr	r3, .L946+212
	ldr	r2, .L946+176
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L946+240
	mov	r2, #35
	cfcmpd	r15, mvd1, mvd0
	str	r2, [r3, #0]
	beq	.L877
	bvs	.L877
.L244:
	ldr	r0, .L946+96
	bl	puts
	ldr	r3, .L946+160
	ldr	r4, .L946+216
	cfldrd	mvd8, [r3, #0]
	ldr	r2, .L946+248
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfldrd	mvd12, [r2, #0]
	ldmia	r4, {r2-r3}	@ double
	bl	__aeabi_dsub
	ldmia	r4, {r2-r3}	@ double
	cfmuld	mvd8, mvd8, mvd12
	mov	r5, r0
	mov	r6, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	mov	r2, r5
	mov	r3, r6
	bl	__aeabi_dsub
	ldmia	r4, {r2-r3}	@ double
	cfmvdlr	mvd13, r0
	cfmvdhr	mvd13, r1
	ldr	ip, .L946+232
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfstrd	mvd13, [ip, #0]
	bl	__aeabi_dsub
	mov	r2, r5
	mov	r3, r6
	bl	__aeabi_dsub
	cfmvdlr	mvd14, r0
	cfmvdhr	mvd14, r1
	ldr	ip, .L946+220
	ldr	r4, .L946+244
	cfstrd	mvd14, [ip, #0]
	ldmia	r4, {r2-r3}	@ double
	cfmvrdl	r0, mvd12
	cfmvrdh	r1, mvd12
	bl	__aeabi_dadd
	ldr	r3, .L946+212
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	cfldrd	mvd10, [r3, #0]
	ldr	ip, .L946+132
	cfmuld	mvd9, mvd9, mvd10
	cfstrd	mvd9, [ip, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dsub
	cfldrd	mvd8, [r4, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd10, mvd8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	cfmvdlr	mvd11, r0
	cfmvdhr	mvd11, r1
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd12
	cfmvrdh	r3, mvd12
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	bl	__aeabi_dsub
	ldr	r3, .L946+228
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd11, mvd0, mvd11
	ldr	r3, .L946+264
	ldr	r2, .L946+224
	cfmuld	mvd0, mvd0, mvd8
	cfcmpd	r15, mvd11, mvd1
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfstrd	mvd11, [r3, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd0, [r2, #0]
	bne	.L247
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd13
	beq	.L878
.L247:
	ldr	r3, .L946+164
	mov	ip, #0
	mov	r1, ip
	mov	r0, #1
	ldr	r2, .L946+100
	str	ip, [r3, #0]
	bl	TstCond
.L252:
	ldr	r3, .L946+244
	ldr	r2, .L946+212
	cfldrd	mvd10, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd9, [r2, #0]
	ldr	r5, .L946+248
	cfmuld	mvd9, mvd9, mvd10
	ldmia	r5, {r2-r3}	@ double
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dadd
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	cfmuld	mvd8, mvd8, mvd8
	bl	__aeabi_dadd
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	bic	ip, r1, #-2147483648
	mov	r1, ip
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	bl	__aeabi_dsub
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldmia	r5, {r0-r1}	@ double
	ldr	ip, .L946+232
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	cfstrd	mvd9, [ip, #0]
	bl	__aeabi_dsub
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	ip, .L946+264
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	cfstrd	mvd8, [ip, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd8, mvd8
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	bic	ip, r1, #-2147483648
	mov	r1, ip
	ldr	ip, .L946+140
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dsub
	ldr	r3, .L946+228
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L946+220
	cfcmpd	r15, mvd9, mvd0
	stmia	r3, {r0-r1}	@ double
	movgt	r1, #0
	bgt	.L254
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	movgt	r1, #0
	movle	r1, #1
.L254:
	ldr	r8, .L946+248
	ldr	r6, .L946+244
	mov	r0, #0
	ldr	r2, .L946+104
	bl	TstCond
	ldmia	r6, {r2-r3}	@ double
	ldmia	r8, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldmia	r6, {r2-r3}	@ double
	mov	r4, r0
	mov	r5, r1
	ldmia	r8, {r0-r1}	@ double
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r6, r0
	mov	r7, r1
	mov	r3, r5
	ldmia	r8, {r0-r1}	@ double
	bl	__aeabi_ddiv
	mov	r2, r6
	mov	r3, r7
	bl	__aeabi_dsub
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldmia	r8, {r0-r1}	@ double
	ldr	ip, .L946+232
	ldr	sl, .L946+192
	cfstrd	mvd9, [ip, #0]
	ldmia	sl, {r2-r3}	@ double
	bl	__aeabi_ddiv
	ldr	r9, .L946+108
	mov	r4, r0
	mov	r5, r1
	ldmia	r9, {r2-r3}	@ double
	ldmia	sl, {r0-r1}	@ double
	bl	__aeabi_ddiv
	mov	r6, r0
	mov	r7, r1
	mov	r0, r4
	mov	r1, r5
	mov	r2, r6
	mov	r3, r7
	bl	__aeabi_dsub
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	ip, .L946+264
	ldr	r1, .L946+112
	cfstrd	mvd8, [ip, #0]
	ldmia	r1, {r2-r3}	@ double
	ldmia	r9, {r0-r1}	@ double
	bl	__aeabi_ddiv
	ldr	ip, .L946+224
	mov	r4, r0
	mov	r5, r1
	mov	r3, r5
	mov	r0, r6
	mov	r1, r7
	mov	r2, r4
	stmia	ip, {r4-r5}	@ double
	bl	__aeabi_dsub
	ldr	r3, .L946+228
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L946+220
	cfcmpd	r15, mvd8, mvd0
	stmia	r3, {r0-r1}	@ double
	bne	.L255
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd9
	beq	.L879
.L255:
	mov	r1, #0
.L258:
	ldr	sl, .L946+248
	ldr	r4, .L946+160
	mov	r0, #2
	ldr	r2, .L946+116
	bl	TstCond
	ldmia	sl, {r2-r3}	@ double
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_ddiv
	ldr	r8, .L946+216
	mov	r6, r0
	mov	r7, r1
	ldmia	r8, {r2-r3}	@ double
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldmia	r8, {r2-r3}	@ double
	mov	r4, r0
	mov	r5, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	ip, .L946+232
	ldr	r1, .L946+244
	cfstrd	mvd8, [ip, #0]
	ldmia	r1, {r2-r3}	@ double
	ldmia	sl, {r0-r1}	@ double
	bl	__aeabi_dadd
	ldmia	sl, {r2-r3}	@ double
	mov	r6, r0
	mov	r7, r1
	bl	__aeabi_ddiv
	ldr	ip, .L946+224
	mov	r4, r0
	mov	r5, r1
	mov	r3, r7
	mov	r2, r6
	stmia	ip, {r4-r5}	@ double
	bl	__aeabi_dsub
	ldr	r3, .L946+228
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd1, [r3, #0]
	ldr	r3, .L946+264
	cfcmpd	r15, mvd0, mvd1
	stmia	r3, {r0-r1}	@ double
	bne	.L259
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd8
	beq	.L880
.L259:
	ldr	r3, .L946+120
	mov	ip, #0
	mov	r1, ip
	mov	r0, #1
	ldr	r2, .L946+124
	str	ip, [r3, #0]
	bl	TstCond
.L263:
	ldr	sl, .L946+248
	ldr	r8, .L946+244
	ldmia	sl, {r4-r5}	@ double
	ldmia	r8, {r2-r3}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ddiv
	ldr	r9, .L946+264
	ldr	r3, .L946+216
	mov	r6, r0
	mov	r7, r1
	ldmia	r3, {r4-r5}	@ double
	stmia	r9, {r6-r7}	@ double
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	mov	r3, r5
	mov	r2, r4
	bl	__aeabi_dsub
	ldr	lr, .L946+228
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [lr, #0]
	ldr	fp, .L946+232
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	movge	r1, #0
	movlt	r1, #1
	cfstrd	mvd1, [fp, #0]
	mov	r0, #1
	ldr	r2, .L946+128
	bl	TstCond
	ldmia	r8, {r2-r3}	@ double
	ldmia	sl, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldr	r3, .L946+212
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd8, [r3, #0]
	ldmia	sl, {r2-r3}	@ double
	cfmuld	mvd0, mvd8, mvd0
	cfmvdlr	mvd11, r0
	cfmvdhr	mvd11, r1
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	bl	__aeabi_dadd
	cfmvdlr	mvd10, r0
	cfmvdhr	mvd10, r1
	ldr	ip, .L946+220
	ldr	r4, .L946+224
	cfmuld	mvd0, mvd11, mvd8
	cfmuld	mvd9, mvd10, mvd8
	cfstrd	mvd0, [ip, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfstrd	mvd9, [r4, #0]
	bl	__aeabi_ddiv
	ldr	ip, .L946+132
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	stmia	ip, {r4-r5}	@ double
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_ddiv
	ldr	ip, .L946+136
	mov	r6, r0
	mov	r7, r1
	cfmvrdl	r2, mvd11
	cfmvrdh	r3, mvd11
	stmia	ip, {r6-r7}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	mov	r0, r6
	mov	r1, r7
	cfstrd	mvd8, [r9, #0]
	bl	__aeabi_dsub
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	ldr	r0, .L946+228
	cfstrd	mvd1, [fp, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r0, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd0
	movne	r1, #0
	bne	.L265
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	movne	r1, #0
	moveq	r1, #1
.L265:
	ldr	r6, .L946+248
	ldr	r8, .L946+140
	mov	r0, #0
	ldr	r2, .L946+144
	bl	TstCond
	ldmia	r8, {r2-r3}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dsub
	mov	r5, r1
	ldr	r1, .L946+160
	mov	r4, r0
	ldmia	r1, {r2-r3}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r6, {r0-r1}	@ double
	ldr	ip, .L946+264
	mov	r2, r4
	mov	r3, r5
	cfstrd	mvd8, [ip, #0]
	bl	__aeabi_dsub
	cfmvdlr	mvd10, r0
	cfmvdhr	mvd10, r1
	ldr	ip, .L946+232
	ldr	r7, .L946+212
	ldr	sl, .L946+244
	cfstrd	mvd10, [ip, #0]
	ldmia	sl, {r2-r3}	@ double
	ldmia	r7, {r0-r1}	@ double
	bl	__aeabi_dsub
	mov	r5, r1
	ldr	r1, .L946+148
	mov	r4, r0
	ldmia	r1, {r2-r3}	@ double
	ldmia	r7, {r0-r1}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldmia	r7, {r0-r1}	@ double
	ldr	ip, .L946+220
	mov	r3, r5
	mov	r2, r4
	cfstrd	mvd9, [ip, #0]
	bl	__aeabi_dsub
	cfldrd	mvd0, [r8, #0]
	ldr	r3, .L946+224
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	stmia	r3, {r0-r1}	@ double
	bne	.L266
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd10
	beq	.L881
.L266:
	ldr	r3, .L946+152
	mov	ip, #0
	mov	r1, ip
	mov	r0, #1
	ldr	r2, .L946+156
	str	ip, [r3, #0]
	bl	TstCond
.L271:
	ldr	r3, .L946+160
	ldr	r2, .L946+248
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	beq	.L272
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	bl	__aeabi_dsub
	ldr	r3, .L946+228
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L882
	bvs	.L882
.L272:
	ldr	r3, .L946+164
	ldr	r2, [r3, #0]
	cmp	r2, #1
	beq	.L883
.L275:
	ldr	r3, .L946+240
	mov	r2, #40
	str	r2, [r3, #0]
	bl	Pause
	ldr	r0, .L946+168
	bl	puts
	ldr	ip, .L946+172
	mov	r5, #0
	ldr	r6, .L946+176
	str	r5, [ip, #0]
	ldr	r4, .L946+180
	ldr	ip, .L946+184
	ldr	r7, .L946+212
	ldmia	r6, {r2-r3}	@ double
	str	r5, [r4, #0]
	str	r5, [ip, #0]
	ldmia	r7, {r0-r1}	@ double
	bl	__aeabi_ddiv
	ldmia	r6, {r3-r4}	@ double
	ldr	ip, .L946+196
	ldr	r2, .L946+188
	stmia	ip, {r3-r4}	@ double
	stmia	r2, {r0-r1}	@ double
	ldr	r5, .L946+204
	ldr	r6, .L946+264
	ldr	sl, .L946+248
	ldr	fp, .L946+192
	mov	r8, ip
	mov	r9, ip
.L628:
	ldmia	r7, {r3-r4}	@ double
	stmia	r5, {r3-r4}	@ double
.L276:
	cfldrd	mvd9, [r5, #0]
	ldmia	r8, {r2-r3}	@ double
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	cfstrd	mvd9, [r6, #0]
	bl	__aeabi_ddiv
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfstrd	mvd8, [r5, #0]
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	beq	.L276
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd2, [sl, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd9, mvd2
	bne	.L884
.L278:
	ldr	r3, .L946+264
	ldr	r2, .L946+248
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	ldreq	r3, .L946+212
	ldreq	r0, .L946+196
	ldmeqia	r3, {r1-r2}	@ double
	stmeqia	r0, {r1-r2}	@ double
.L281:
	ldr	r6, .L946+196
	ldr	r2, .L946+248
	ldr	fp, .L946+200
	ldmia	r2, {r0-r1}	@ double
	ldmia	r6, {r2-r3}	@ double
	bl	__aeabi_ddiv
	ldmia	r6, {r4-r5}	@ double
	ldr	r3, .L946+204
	ldr	r6, .L946+264
	stmia	r3, {r0-r1}	@ double
	ldr	r3, .L946+232
	ldr	r2, .L946+208
	stmia	r6, {r4-r5}	@ double
	stmia	r3, {r0-r1}	@ double
	mov	r5, r6
	mov	r3, #0
	ldr	r9, .L946+212
	ldr	r6, .L946+232
	ldr	r7, .L946+248
	str	r3, [r2, #0]
	mov	sl, r3
	mov	r8, r2
.L283:
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r5, #0]
	ldr	ip, .L946+216
	cfmuld	mvd0, mvd0, mvd1
	ldmia	ip, {r2-r3}	@ double
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	bl	__aeabi_dsub
	ldr	lr, .L946+216
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [lr, #0]
	ldr	r3, .L946+220
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	movne	r1, #0
	moveq	r1, #1
	cfstrd	mvd1, [r3, #0]
	mov	r0, sl
	mov	r2, fp
	bl	TstCond
	ldmia	r7, {r0-r1}	@ double
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r5, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	movne	r4, #0
	moveq	r4, #1
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	str	r4, [r8, #0]
	cfstrd	mvd0, [r5, #0]
	bl	__aeabi_ddiv
	cmp	r4, #0
	stmia	r6, {r0-r1}	@ double
	beq	.L283
	ldr	r4, .L946+244
	ldr	r5, .L946+248
	ldmia	r4, {r2-r3}	@ double
	ldmia	r5, {r0-r1}	@ double
	bl	__aeabi_dadd
	ldmia	r4, {r2-r3}	@ double
	cfmvdlr	mvd13, r0
	cfmvdhr	mvd13, r1
	ldmia	r5, {r0-r1}	@ double
	ldr	ip, .L946+252
	ldr	r6, .L946+260
	cfstrd	mvd13, [ip, #0]
	bl	__aeabi_dsub
	ldmia	r4, {r2-r3}	@ double
	cfmvdlr	mvd12, r0
	cfmvdhr	mvd12, r1
	ldmia	r6, {r0-r1}	@ double
	ldr	r8, .L946+256
	ldr	fp, .L946+220
	cfstrd	mvd12, [r8, #0]
	bl	__aeabi_dsub
	ldmia	r4, {r2-r3}	@ double
	cfmvdlr	mvd11, r0
	cfmvdhr	mvd11, r1
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dadd
	ldmia	r4, {r2-r3}	@ double
	cfmvdlr	mvd14, r0
	cfmvdhr	mvd14, r1
	cfmvrdl	r0, mvd11
	cfmvrdh	r1, mvd11
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd0, mvd13
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfmvrdl	r2, mvd11
	cfmvrdh	r3, mvd11
	bl	__aeabi_dsub
	cfmuld	mvd8, mvd14, mvd12
	str	r0, [sp, #72]
	str	r1, [sp, #76]
	add	r9, sp, #72
	ldmia	r9, {r9-sl}
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfmvrdl	r2, mvd11
	cfmvrdh	r3, mvd11
	stmia	fp, {r9-sl}	@ double
	bl	__aeabi_dsub
	ldmia	r4, {r2-r3}	@ double
	cfmvdlr	mvd10, r0
	cfmvdhr	mvd10, r1
	ldr	r7, .L946+224
	cfmvrdl	r0, mvd14
	cfmvrdh	r1, mvd14
	cfstrd	mvd10, [r7, #0]
	bl	__aeabi_dadd
	ldmia	r6, {r2-r3}	@ double
	cfmuld	mvd0, mvd11, mvd13
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	bl	__aeabi_dsub
	ldmia	r6, {r2-r3}	@ double
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldr	ip, .L946+264
	cfmuld	mvd8, mvd8, mvd12
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfstrd	mvd9, [ip, #0]
	bl	__aeabi_dsub
	ldr	r3, .L946+228
	ldr	lr, .L946+232
	cfldrd	mvd15, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd9, mvd15
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	stmia	lr, {r0-r1}	@ double
	bne	.L284
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd15
	beq	.L885
.L284:
	ldr	r0, .L946+236
	bl	puts
.L304:
	ldr	ip, .L946+240
	ldr	r5, .L946+244
	ldr	r6, .L946+248
	mov	r4, #45
	str	r4, [ip, #0]
	ldmia	r5, {r2-r3}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dadd
	ldmia	r5, {r2-r3}	@ double
	ldr	r8, .L946+252
	str	r0, [sp, #56]
	str	r1, [sp, #60]
	ldmia	r6, {r0-r1}	@ double
	add	r6, sp, #56
	ldmia	r6, {r6-r7}
	stmia	r8, {r6-r7}	@ double
	bl	__aeabi_dsub
	ldmia	r5, {sl-fp}	@ double
	ldr	r9, .L946+260
	ldr	r6, .L946+256
	str	r0, [sp, #48]
	str	r1, [sp, #52]
	ldmia	r9, {r2-r3}	@ double
	add	r4, sp, #48
	ldmia	r4, {r4-r5}
	mov	r0, sl
	stmia	r6, {r4-r5}	@ double
	mov	r1, fp
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, sl
	mov	r1, fp
	bl	__aeabi_dadd
	add	r2, sp, #56
	ldmia	r2, {r2-r3}
	mov	r6, r0
	mov	r7, r1
	bl	__aeabi_ddiv
	mov	r2, sl
	str	r0, [sp, #40]
	str	r1, [sp, #44]
	ldmia	r9, {r0-r1}	@ double
	mov	r3, fp
	bl	__aeabi_dsub
	mov	r2, sl
	mov	r3, fp
	bl	__aeabi_dsub
	mov	r2, sl
	mov	r3, fp
	mov	r4, r0
	mov	r5, r1
	bl	__aeabi_dsub
	add	r2, sp, #48
	ldmia	r2, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, sl
	mov	r8, r0
	mov	r9, r1
	mov	r0, r6
	mov	r1, r7
	mov	r3, fp
	bl	__aeabi_dadd
	add	r2, sp, #56
	ldmia	r2, {r2-r3}
	bl	__aeabi_ddiv
	ldr	ip, .L946+260
	mov	r6, r0
	ldmia	ip, {r2-r3}	@ double
	mov	r7, r1
	add	r0, sp, #40
	ldmia	r0, {r0-r1}
	bl	__aeabi_dsub
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	lr, .L946+264
	mov	r2, r4
	cfstrd	mvd8, [lr, #0]
	mov	r3, r5
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dsub
	add	r2, sp, #48
	ldmia	r2, {r2-r3}
	cfmvdlr	mvd11, r0
	cfmvdhr	mvd11, r1
	mov	r0, r4
	ldr	r4, .L949
	mov	r1, r5
	cfstrd	mvd11, [r4, #0]
	bl	__aeabi_ddiv
	ldr	r8, .L949+4
	mov	r4, r0
	mov	r5, r1
	mov	r2, sl
	ldmia	r8, {r0-r1}	@ double
	mov	r3, fp
	bl	__aeabi_dadd
	mov	r8, r0
	mov	r9, r1
	mov	r2, r8
	mov	r3, r9
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldr	ip, .L949+4
	ldr	lr, .L949+8
	ldmia	ip, {r2-r3}	@ double
	mov	r0, sl
	mov	r1, fp
	cfstrd	mvd9, [lr, #0]
	bl	__aeabi_dsub
	mov	r3, r5
	mov	r2, r4
	bl	__aeabi_dadd
	ldr	r3, .L949+12
	ldr	ip, .L949+16
	cfldrd	mvd10, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd10
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	stmia	ip, {r0-r1}	@ double
	bvs	.L305
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd11
	bge	.L886
.L305:
	ldr	r3, .L949+20
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L887
.L319:
	ldr	r6, .L949+24
	ldr	r5, .L949+28
	ldmia	r6, {r2-r3}	@ double
	ldmia	r5, {r0-r1}	@ double
	bl	__aeabi_ddiv
	ldr	r4, .L949+32
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd8, [r4, #0]
	ldr	ip, .L949+36
	cfmuld	mvd0, mvd1, mvd0
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfstrd	mvd1, [ip, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	movne	r1, #0
	moveq	r1, #1
	mov	r0, #0
	ldr	r2, .L949+40
	bl	TstCond
	cfldrd	mvd8, [r4, #0]
	ldr	r3, .L949+44
	ldr	ip, .L949+48
	ldmia	r3, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	ldr	ip, .L949+52
	mov	r4, #50
	str	r4, [ip, #0]
	bl	__aeabi_dadd
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	movne	r1, #0
	bne	.L321
	ldr	ip, .L949+56
	ldr	r3, .L949+60
	ldmia	r5, {r4-r5}	@ double
	ldmia	r3, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	mov	r2, r4
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r6, {r0-r1}	@ double
	mov	r3, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	movne	r1, #0
	moveq	r1, #1
.L321:
	mov	r0, #0
	ldr	r2, .L949+64
	bl	TstCond
	ldr	r3, .L949+48
	ldr	r4, .L949+28
	cfldrd	mvd0, [r3, #0]
	ldmia	r4, {r0-r1}	@ double
	cfmuld	mvd0, mvd0, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	bl	__aeabi_dsub
	ldmia	r4, {r6-r7}	@ double
	ldr	r3, .L949+56
	str	r0, [sp, #32]
	str	r1, [sp, #36]
	cfldrd	mvd8, [r3, #0]
	mov	r0, r6
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r1, r7
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd8, mvd8, mvd0
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	ldr	r8, .L949+32
	ldr	ip, .L949+44
	mov	r9, r0
	mov	sl, r1
	ldmia	r8, {r2-r3}	@ double
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldmia	r8, {r2-r3}	@ double
	ldr	ip, .L949+8
	mov	r4, r0
	mov	r5, r1
	stmia	ip, {r4-r5}	@ double
	add	r0, sp, #32
	ldmia	r0, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	ip, .L949+68
	mov	r3, r7
	mov	r2, r6
	mov	r0, r9
	mov	r1, sl
	cfstrd	mvd8, [ip, #0]
	bl	__aeabi_dsub
	ldr	r3, .L949+12
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L949
	cfcmpd	r15, mvd8, mvd0
	stmia	r3, {r0-r1}	@ double
	bne	.L322
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L888
.L322:
	ldr	fp, .L949+72
	ldr	r9, [fp, #0]
	cmp	r9, #1
	bne	.L325
	ldr	r1, .L949+56
	ldr	sl, .L949+32
	cfldrd	mvd10, [r1, #0]
	ldmia	sl, {r2-r3}	@ double
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	bl	__aeabi_dadd
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldmia	sl, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldr	r8, .L949+28
	cfmuld	mvd9, mvd10, mvd9
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r8, {r0-r1}	@ double
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dadd
	cfmuld	mvd8, mvd10, mvd8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r4, r0
	mov	r5, r1
	ldmia	r8, {r0-r1}	@ double
	bl	__aeabi_dadd
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	mov	r6, r0
	mov	r7, r1
	ldmia	r8, {r0-r1}	@ double
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r8, {r0-r1}	@ double
	ldr	ip, .L949+68
	mov	r3, r7
	mov	r2, r6
	cfstrd	mvd8, [ip, #0]
	bl	__aeabi_dsub
	ldr	r3, .L949+12
	ldr	lr, .L949
	cfldrd	mvd11, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd11
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	stmia	lr, {r0-r1}	@ double
	bne	.L325
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd11
	beq	.L889
.L325:
	ldr	r0, .L949+76
	bl	puts
.L332:
	ldr	r2, .L949+32
	ldr	r3, .L949+28
	cfldrd	mvd9, [r2, #0]
	ldmia	r3, {r4-r5}	@ double
	ldr	sl, .L949+80
	mov	r0, r4
	stmia	sl, {r4-r5}	@ double
	mov	r1, r5
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd9, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	ldr	ip, .L949+68
	mov	r7, r1
	ldr	r1, .L949+56
	mov	r6, r0
	ldmia	r1, {r2-r3}	@ double
	mov	r0, r4
	mov	r1, r5
	stmia	ip, {r6-r7}	@ double
	bl	__aeabi_dadd
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	ip, .L949
	cfmuld	mvd8, mvd8, mvd9
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfstrd	mvd8, [ip, #0]
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	ldr	ip, .L949+8
	mov	r8, r0
	mov	r9, r1
	mov	r2, r6
	mov	r3, r7
	stmia	ip, {r8-r9}	@ double
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	ldr	ip, .L949+16
	mov	r4, r0
	mov	r5, r1
	mov	r3, r9
	mov	r2, r8
	stmia	ip, {r4-r5}	@ double
	bl	__aeabi_dadd
	ldr	r3, .L949+12
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd1, [r3, #0]
	ldr	r3, .L949+84
	cfcmpd	r15, mvd0, mvd1
	stmia	r3, {r0-r1}	@ double
	bne	.L890
.L333:
	ldr	r3, .L949+88
	ldr	sl, .L949+12
	ldr	r2, [r3, #0]
	ldmia	sl, {r3-r4}	@ double
	cmp	r2, #1
	ldr	r2, .L949+84
	stmia	r2, {r3-r4}	@ double
	beq	.L891
.L335:
	ldr	r3, .L949+84
	ldr	r2, .L949+28
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L836
	ldr	r0, .L949+92
	bl	puts
.L352:
	ldr	r3, .L949+88
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L353
	ldr	r3, .L949+96
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bne	.L892
.L353:
	mov	r1, #0
.L354:
	ldr	r2, .L949+100
	mov	r0, #3
	bl	TstCond
	ldr	r3, .L949+52
	mov	r2, #60
	str	r2, [r3, #0]
	ldr	r5, .L949+104
	mov	r0, #10
	bl	putchar
	ldr	r0, .L949+108
	bl	printf
	ldr	r1, [r5, #0]
	ldr	r0, .L949+112
	bl	printf
	ldr	r4, .L949+116
	ldr	r3, .L949+120
	ldr	r2, .L949+124
	ldr	r1, .L949+128
	stmia	r2, {r3-r4}	@ double
	ldmia	r1, {r3-r4}	@ double
	ldr	r2, .L949+132
	ldr	r1, .L949+136
	stmia	r2, {r3-r4}	@ double
	ldr	r6, .L949+68
	mov	r3, #1
	ldr	fp, .L949
	ldr	r7, .L949+12
	str	r3, [r1, #0]
	mov	r4, r1
.L356:
	bl	Random
	stmia	r6, {r0-r1}	@ double
	bl	Random
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd1, mvd0, mvd1
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	ldr	ip, .L949+8
	mov	r2, r0
	mov	r3, r1
	cfstrd	mvd1, [ip, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd0, [fp, #0]
	bl	__aeabi_dsub
	ldr	r3, [r4, #0]
	ldr	r2, [r5, #0]
	add	r3, r3, #1
	ldr	lr, .L949+140
	cmp	r3, r2
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	stmia	lr, {r0-r1}	@ double
	str	r3, [r4, #0]
	bgt	.L355
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L356
	cmp	r2, r3
	beq	.L893
.L355:
	ldr	r3, .L949+104
	ldr	r2, .L949+136
	ldr	r1, [r3, #0]
	ldr	r3, [r2, #0]
	cmp	r3, r1
	beq	.L358
	ldr	r3, .L949+140
	ldr	r2, .L949+12
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L894
.L358:
	ldr	r0, .L949+144
	bl	printf
.L359:
	ldr	r3, .L949+52
	mov	r2, #70
	ldr	r4, .L949+12
	str	r2, [r3, #0]
	ldr	r0, .L949+148
	bl	puts
	ldmia	r4, {r0-r1}	@ double
	bl	sqrt
	ldmia	r4, {r2-r3}	@ double
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmvdlr	mvd1, r2
	cfmvdhr	mvd1, r3
	cfcmpd	r15, mvd0, mvd1
	beq	.L895
.L360:
	mov	r1, #0
.L364:
	ldr	r2, .L949+152
	mov	r0, #0
	bl	TstCond
	ldr	r2, .L949+24
	ldr	r1, .L949+156
	ldmia	r2, {r3-r4}	@ double
	ldr	r2, .L949+56
	ldr	r8, .L949+68
	ldr	r7, .L949+160
	ldmia	r2, {r5-r6}	@ double
	ldr	r9, .L949+12
	ldr	r2, .L949+164
	ldr	sl, .L949+168
	mov	r0, #1
	stmia	r8, {r3-r4}	@ double
	ldmia	r9, {r3-r4}	@ double
	stmia	r7, {r5-r6}	@ double
	stmia	r2, {r3-r4}	@ double
	stmia	r1, {r3-r4}	@ double
	stmia	sl, {r3-r4}	@ double
	bl	SqXMinX
	ldr	r4, .L949+48
	ldr	r3, .L949+36
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd1, mvd0
	mov	r0, #1
	cfstrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd1, [r8, #0]
	bl	SqXMinX
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd0, mvd0
	cfstrd	mvd1, [r7, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd0, [r8, #0]
	mov	r0, #1
	bl	SqXMinX
	cfldrd	mvd1, [sl, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L896
.L365:
	ldr	r8, .L949+104
	ldr	r0, .L949+172
	ldr	r1, [r8, #0]
	bl	printf
	ldr	r6, .L949+24
	ldr	r3, .L949+28
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	ldr	r5, .L949+68
	ldr	r3, .L949+12
	ldr	lr, .L949
	ldr	r0, .L949+168
	ldr	ip, .L949+176
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	ldmia	r3, {r1-r2}	@ double
	cfstrd	mvd1, [lr, #0]
	ldmia	ip, {r3-r4}	@ double
	stmia	r0, {r1-r2}	@ double
	stmia	r5, {r3-r4}	@ double
	beq	.L367
	mov	r7, r5
	mov	r4, lr
	mov	r5, r8
.L837:
	cfldrd	mvd1, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd0, mvd1
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfstrd	mvd1, [r7, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd0, [r4, #0]
	bl	__aeabi_dsub
	ldr	r3, [r5, #0]
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfmv64lr	mvdx0, r3
	cfcvt32d	mvd0, mvfx0
	cfcmpd	r15, mvd1, mvd0
	beq	.+12
	bvs	.+8
	b	.L837
.L367:
	ldr	r3, .L949+56
	ldr	r0, .L949+68
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r0, #0]
	ldr	r1, .L949+104
	ldr	ip, .L949+136
	ldr	r2, [r1, #0]
	ldr	r3, .L949+160
	cmp	r2, #0
	cfmuld	mvd0, mvd0, mvd1
	mov	r2, #1
	cfstrd	mvd0, [r3, #0]
	str	r2, [ip, #0]
	ble	.L371
	ldr	r9, .L949+28
	ldr	sl, .L949+168
	ldr	r8, .L949+12
	mov	r5, r0
	mov	r4, ip
	mov	r7, r1
	mov	r6, #2
	b	.L803
.L897:
	ldr	r3, [r4, #0]
	ldr	r2, [r7, #0]
	add	r3, r3, #1
	cmp	r2, r3
	str	r3, [r4, #0]
	blt	.L371
.L803:
	ldmia	r5, {r0-r1}	@ double
	ldmia	r9, {r2-r3}	@ double
	bl	__aeabi_dadd
	stmia	r5, {r0-r1}	@ double
	mov	r0, r6
	bl	SqXMinX
	cfldrd	mvd1, [sl, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bvc	.L897
.L371:
	ldr	r0, .L949+180
	bl	puts
	ldr	r3, .L949+24
	ldr	r2, .L949+56
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	ldr	r6, .L949+60
	ldr	r7, .L949+136
	ldr	r8, .L949+68
	ldr	sl, .L949
	mvn	ip, #0
	cfmuld	mvd0, mvd1, mvd0
	ldmia	r6, {r4-r5}	@ double
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	stmia	r8, {r4-r5}	@ double
	str	ip, [r7, #0]
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	cfstrd	mvd1, [sl, #0]
	bl	__aeabi_dadd
	ldr	r4, .L949+8
	ldr	ip, .L949+184
	ldr	r2, .L949+188
	stmia	r4, {r0-r1}	@ double
	mov	r3, #0
	ldr	r5, .L949+192
	str	r3, [ip, #0]
	str	r3, [r2, #0]
	mov	r9, ip
	mov	r6, r4
	mov	fp, #1
.L838:
	ldr	ip, .L949+188
	ldr	r3, [ip, #0]
	cmp	r3, #0
	bne	.L380
.L898:
	ldr	r3, [r9, #0]
	cmp	r3, #0
	bne	.L382
	ldr	r3, [r7, #0]
	ldmia	r8, {r0-r1}	@ double
	add	r3, r3, #1
	str	r3, [r7, #0]
	bl	sqrt
	stmia	r8, {r0-r1}	@ double
	ldmia	sl, {r0-r1}	@ double
	bl	sqrt
	stmia	r5, {r0-r1}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	sqrt
	cfldrd	mvd1, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	mov	r0, r0	@ nop
	cfmvdlr	mvd2, r0
	cfmvdhr	mvd2, r1
	stmia	r6, {r0-r1}	@ double
	bvs	.L374
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd2, mvd1
	bge	.L839
.L374:
	ldr	r0, .L949+188
	ldr	ip, .L949+188
	str	fp, [r0, #0]
	ldr	r3, [ip, #0]
	cmp	r3, #0
	beq	.L898
.L380:
	ldr	r3, .L949+184
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bne	.L382
	ldr	r3, .L949+196
	ldr	r2, .L949+200
	ldr	ip, [r3, #8]
	ldr	r1, .L949+204
	add	ip, ip, #1
	str	ip, [r3, #8]
	ldr	r0, .L949+208
	bl	printf
	ldr	r1, .L949
	ldr	r0, .L949+212
	ldmia	r1, {r2-r3}	@ double
	bl	printf
.L384:
	ldr	ip, .L949+52
	ldr	r6, .L949+164
	ldr	r5, .L949+32
	mov	r4, #80
	str	r4, [ip, #0]
	ldmia	r6, {r0-r1}	@ double
	ldmia	r5, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldmia	r5, {r2-r3}	@ double
	ldr	r8, .L949+156
	stmia	r6, {r0-r1}	@ double
	ldmia	r8, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldr	r6, .L949+28
	ldr	r7, .L949+56
	stmia	r8, {r0-r1}	@ double
	ldmia	r7, {r2-r3}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dadd
	bl	sqrt
	ldmia	r6, {r2-r3}	@ double
	bl	__aeabi_dsub
	ldmia	r7, {r2-r3}	@ double
	bl	__aeabi_ddiv
	ldmia	r6, {r2-r3}	@ double
	ldr	ip, .L949
	mov	r4, r0
	mov	r5, r1
	stmia	ip, {r4-r5}	@ double
	bl	__aeabi_dsub
	ldr	ip, .L949+216
	mov	r4, r0
	ldmia	ip, {r2-r3}	@ double
	mov	r5, r1
	ldmia	r7, {r0-r1}	@ double
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd0
	stmvsia	r8, {r0-r1}	@ double
.L385:
	ldr	ip, .L949+216
	ldr	r3, .L949+56
	ldmia	r3, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	ldr	ip, .L949
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldr	r2, .L949+164
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L949+220
	cfcmpd	r15, mvd1, mvd0
	stmia	r3, {r0-r1}	@ double
	stmltia	r2, {r0-r1}	@ double
.L387:
	ldr	r3, .L949+44
	ldr	r8, .L949+48
	ldmia	r3, {r0-r1}	@ double
	bl	sqrt
	ldr	r3, .L949+56
	ldmia	r3, {r4-r5}	@ double
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	ldr	ip, .L949+28
	mov	r6, r0
	mov	r2, r4
	mov	r3, r5
	mov	r7, r1
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	ldmia	r8, {r2-r3}	@ double
	bl	__aeabi_ddiv
	ldr	r4, .L949
	ldr	ip, .L949+216
	mov	r5, r0
	mov	r6, r1
	ldmia	ip, {r2-r3}	@ double
	ldmia	r8, {r0-r1}	@ double
	stmia	r4, {r5-r6}	@ double
	bl	__aeabi_ddiv
	mov	r3, r1
	mov	r2, r0
	mov	r1, r6
	mov	r0, r5
	bl	__aeabi_dadd
	ldr	r3, .L949+156
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	stmvsia	r3, {r0-r1}	@ double
.L389:
	ldr	ip, .L949+28
	ldr	r3, .L949
	ldmia	r3, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldr	ip, .L949+216
	ldr	r3, .L949+48
	mov	r4, r0
	mov	r5, r1
	ldmia	r3, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	ldr	r2, .L949+164
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L949+220
	cfcmpd	r15, mvd1, mvd0
	stmia	r3, {r0-r1}	@ double
	stmltia	r2, {r0-r1}	@ double
.L391:
	ldr	ip, .L949+160
	ldr	r1, .L949+68
	ldr	r0, .L949+56
	mov	r2, #1
	ldmia	r0, {r3-r4}	@ double
	stmia	r1, {r3-r4}	@ double
	stmia	ip, {r3-r4}	@ double
	ldr	r3, .L949+224
	ldr	r9, .L949+48
	ldr	fp, .L949+32
	str	r2, [r3, #0]
	mov	r8, r1
	mov	sl, ip
	b	.L401
.L950:
	.align	2
.L949:
	.word	Y
	.word	OneAndHalf
	.word	Z
	.word	Zero
	.word	T
	.word	RDiv
	.word	Radix
	.word	One
	.word	Half
	.word	BInvrse
	.word	.LC102
	.word	F9
	.word	U1
	.word	Milestone
	.word	U2
	.word	BMinusU2
	.word	.LC103
	.word	X
	.word	GAddSub
	.word	.LC107
	.word	S
	.word	StickyBit
	.word	GMult
	.word	.LC111
	.word	GDiv
	.word	.LC113
	.word	NoTrials
	.word	.LC114
	.word	.LC115
	.word	1073460858
	.word	-396866390
	.word	Random9
	.word	Third
	.word	Random1
	.word	I
	.word	Z9
	.word	.LC117
	.word	.LC118
	.word	.LC119
	.word	MaxSqEr
	.word	OneUlp
	.word	MinSqEr
	.word	J
	.word	.LC120
	.word	Two
	.word	.LC121
	.word	Monot
	.word	NotMonot
	.word	Q
	.word	ErrCnt
	.word	.LC66
	.word	.LC5
	.word	.LC3
	.word	.LC123
	.word	Eight
	.word	SqEr
	.word	Indx
.L901:
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, .L951
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	beq	.+12
	bvs	.+8
	b	.L899
	mov	r0, r0	@ nop
	cfldrd	mvd9, .L951+8
.L399:
	cfldrd	mvd8, [sl, #0]
	ldr	r3, .L951+84
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	ldmia	r3, {r4-r5}	@ double
	bl	sqrt
	ldr	r3, .L951+236
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd1, mvd0
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ddiv
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	r2, .L951+16
	cfmuld	mvd8, mvd8, mvd9
	ldr	r3, [r2, #0]
	cfmuld	mvd8, mvd8, mvd0
	add	r3, r3, #1
	cmp	r3, #3
	cfstrd	mvd8, [r8, #0]
	str	r3, [r2, #0]
	bgt	.L900
.L401:
	ldmia	r8, {r4-r5}	@ double
	ldmia	r9, {r2-r3}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	ldr	lr, .L951+20
	ldmia	lr, {r2-r3}	@ double
	bl	__aeabi_dadd
	bl	sqrt
	ldr	r2, .L951+124
	ldmia	r2, {r4-r5}	@ double
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	mov	r2, r4
	ldr	r4, .L951+224
	mov	r6, r0
	mov	r7, r1
	mov	r3, r5
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldmia	r8, {r2-r3}	@ double
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	ldmia	sl, {r2-r3}	@ double
	bl	__aeabi_ddiv
	cfldrd	mvd8, [r8, #0]
	ldr	r5, .L951+152
	mov	r6, r0
	mov	r7, r1
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	ldmia	r9, {r0-r1}	@ double
	stmia	r5, {r6-r7}	@ double
	bl	__aeabi_dsub
	ldr	ip, .L951+20
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldmia	sl, {r2-r3}	@ double
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd9, [fp, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd0, mvd9
	cfmuld	mvd0, mvd8, mvd0
	cfmuld	mvd8, mvd8, mvd0
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_ddiv
	ldr	lr, .L951+180
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	stmia	lr, {r4-r5}	@ double
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r3, r1
	mov	r2, r0
	mov	r1, r5
	mov	r0, r4
	bl	__aeabi_dadd
	ldr	r3, .L951+24
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	stmltia	r3, {r0-r1}	@ double
.L393:
	ldr	r4, .L951+152
	ldr	r5, .L951+180
	ldmia	fp, {r2-r3}	@ double
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldmia	r5, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldr	r2, .L951+28
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L951+32
	cfcmpd	r15, mvd1, mvd0
	stmia	r3, {r0-r1}	@ double
	stmvsia	r2, {r0-r1}	@ double
.L395:
	ldr	r2, .L951+16
	ldr	r3, [r2, #0]
	cmp	r3, #3
	cmpne	r3, #1
	beq	.L901
	ldr	ip, [r9, #0]
	ldr	r0, [r9, #4]
	mov	r1, ip
	mov	r2, r0
	stmia	sl, {r1-r2}	@ double
	ldr	r2, .L951+16
	add	r0, r0, #-2147483648
	ldr	r3, [r2, #0]
	str	ip, [r8, #0]
	add	r3, r3, #1
	cmp	r3, #3
	str	r0, [r8, #4]
	str	r3, [r2, #0]
	ble	.L401
.L900:
	ldr	sl, .L951+220
	ldr	r9, .L951+224
	cfldrd	mvd1, [sl, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	ldr	r3, .L951+160
	ldr	r2, .L951+36
	mov	r0, #0
	mov	r1, #85
	str	r1, [r3, #0]
	str	r0, [r2, #0]
	ldr	r3, .L951+40
	ldr	r2, .L951+44
	cfcmpd	r15, mvd1, mvd0
	str	r0, [r3, #0]
	str	r0, [r2, #0]
	bne	.L902
.L402:
	ldr	r3, .L951+44
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L434
.L435:
	ldr	r3, .L951+40
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bne	.L440
.L441:
	ldr	r3, .L951+160
	mov	r2, #90
	str	r2, [r3, #0]
	bl	Pause
	ldr	r0, .L951+48
	bl	puts
	ldr	r3, .L951+196
	ldr	r4, .L951+180
	ldmia	r3, {r7, ip}	@ phole ldm
	ldr	r5, .L951+204
	ldr	r3, .L951+80
	ldr	r2, .L951+184
	ldr	r6, .L951+68
	ldr	r9, .L951+112
	ldr	sl, .L951+224
	mov	r0, #0
	add	ip, ip, #-2147483648
	mov	r1, #3
	str	r7, [r4, #0]
	str	r1, [r3, #0]
	str	ip, [r4, #4]
	str	r0, [r2, #0]
	str	r0, [r6, #0]
	str	r0, [r5, #0]
	mov	r7, r4
	ldmia	sl, {r3-r4}	@ double
	stmia	r9, {r3-r4}	@ double
	bl	SR3980
	ldr	r3, [r5, #0]
	ldr	r8, .L951+52
	cmp	r3, #10
	mvn	fp, #3
	ble	.L903
	mov	r0, r0	@ nop
.L442:
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	bne	.L847
	ldr	r3, .L951+68
	mov	r2, #1
	str	r2, [r3, #0]
.L445:
	bl	PrintIfNPositive
	ldr	r2, .L951+184
	ldr	r3, .L951+56
	ldr	ip, [r2, #0]
	ldr	r5, .L951+60
	ldmia	r3, {r0-r1}	@ double
	ldr	r7, .L951+180
	ldr	r3, .L951+96
	mov	r6, #0
	str	ip, [r3, #0]
	str	r6, [r2, #0]
	ldmia	r5, {r3-r4}	@ double
	stmia	r7, {r3-r4}	@ double
	bl	log
	ldr	r3, .L951+116
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r5, {r0-r1}	@ double
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd8, mvd0
	bl	log
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_ddiv
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	b	.L952
.L953:
	.align	3
.L951:
	.word	0
	.word	0
	.word	0
	.word	1072693248
	.word	Indx
	.word	F9
	.word	MinSqEr
	.word	MaxSqEr
	.word	SqEr
	.word	RSqrt
	.word	SqRWrng
	.word	Anomaly
	.word	.LC134
	.word	MinusOne
	.word	W
	.word	A1
	.word	AInvrse
	.word	Break
	.word	Three
	.word	NoTrials
	.word	M
	.word	Eight
	.word	.LC135
	.word	.LC136
	.word	N1
	.word	.LC138
	.word	U1
	.word	BInvrse
	.word	X
	.word	Two
	.word	HInvrse
	.word	U2
	.word	Q
	.word	E9
	.word	C
	.word	D
	.word	PseudoZero
	.word	CInvrse
	.word	Y
	.word	Y1
	.word	Milestone
	.word	S
	.word	H
	.word	E0
	.word	.LC151
	.word	Z
	.word	N
	.word	Underflow
	.word	E1
	.word	Zero
	.word	UfThold
	.word	I
	.word	UfNGrad
	.word	.LC53
	.word	.LC54
	.word	Radix
	.word	One
	.word	Precision
	.word	.LC56
	.word	Nine
	.word	Half
.L952:
	cftruncd32	mvfx1, mvd0
	cfmvr64l	r1, mvdx1
	ldr	r2, .L951+68
	ldr	r3, .L951+80
	mov	fp, #1
	ldr	r9, .L951+112
	ldr	sl, .L951+204
	ldr	r8, .L951+64
	str	r6, [r2, #0]
	str	r1, [r3, #0]
	mov	r6, r2
	mov	r5, fp
.L450:
	ldmia	r7, {r3-r4}	@ double
	str	r5, [sl, #0]
	stmia	r9, {r3-r4}	@ double
	bl	SR3980
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	bne	.L848
	ldr	r3, .L951+68
	str	fp, [r3, #0]
.L449:
	ldr	r0, .L951+180
	ldr	ip, .L951+72
	ldr	r2, .L951+76
	ldmia	ip, {r3-r4}	@ double
	ldr	lr, [r2, #0]
	stmia	r0, {r3-r4}	@ double
	ldr	r2, .L951+80
	ldr	r3, .L951+160
	mov	r1, #100
	ldr	fp, .L951+112
	ldr	r9, .L951+204
	ldr	r7, .L951+116
	ldr	sl, .L951+84
	str	r1, [r3, #0]
	str	lr, [r2, #0]
	mov	r5, r0
	mov	r6, ip
	mov	r8, #1
.L452:
	ldmia	r5, {r3-r4}	@ double
	str	r8, [r9, #0]
	stmia	fp, {r3-r4}	@ double
	bl	SR3980
.L451:
	ldmia	r5, {r0-r1}	@ double
	ldmia	r7, {r2-r3}	@ double
	bl	__aeabi_dadd
	cfldrd	mvd9, [r6, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	cfstrd	mvd8, [r5, #0]
	bl	__aeabi_ddiv
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd9, mvd0
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	beq	.L451
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd9, mvd0
	cfcmpd	r15, mvd8, mvd0
	blt	.L452
	ldr	r3, .L951+184
	ldr	r2, [r3, #0]
	cmp	r2, #0
	ble	.L453
	ldr	r0, .L951+88
	bl	puts
	ldr	r0, .L951+92
	bl	puts
.L453:
	bl	PrintIfNPositive
	ldr	r0, .L951+184
	ldr	r2, .L951+96
	ldr	r1, [r0, #0]
	ldr	r3, [r2, #0]
	add	r3, r3, r1
	cmp	r3, #0
	str	r3, [r0, #0]
	beq	.L904
	ldr	r3, .L951+184
	ldr	r2, [r3, #0]
	cmp	r2, #0
	ble	.L455
.L939:
	bl	Pause
.L456:
	ldr	r3, .L951+160
	mov	r2, #110
	str	r2, [r3, #0]
	ldr	r0, .L951+100
	bl	puts
	ldr	r3, .L951+228
	ldr	r2, .L951+104
	cfldrd	mvd8, [r3, #0]
	ldmia	r2, {r3-r4}	@ double
	ldr	r5, .L951+140
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	stmia	r5, {r3-r4}	@ double
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	beq	.L457
	ldr	r3, .L951+108
	ldr	r0, .L951+112
	ldmia	r3, {r1-r2}	@ double
	cfstrd	mvd8, [r0, #0]
	stmia	r5, {r1-r2}	@ double
	ldr	r8, .L951+224
	ldr	r7, .L951+196
	mov	r6, r3
	mov	r4, r0
.L459:
	cfldrd	mvd0, [r6, #0]
	ldmia	r4, {r0-r1}	@ double
	ldmia	r8, {r2-r3}	@ double
	cfldrd	mvd1, [r5, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd1, mvd0
	cfstrd	mvd1, [r5, #0]
	bl	__aeabi_dsub
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd0
	stmia	r4, {r0-r1}	@ double
	bvs	.L459
.L457:
	ldr	r2, .L951+224
	ldr	r1, .L951+152
	ldmia	r2, {r3-r4}	@ double
	ldr	r0, .L951+180
	ldr	r2, .L951+140
	stmia	r1, {r3-r4}	@ double
	ldmia	r2, {r3-r4}	@ double
	stmia	r0, {r3-r4}	@ double
	ldr	r8, .L951+136
	mov	r7, r1
	mov	r6, r0
.L462:
	cfldrd	mvd0, [r6, #0]
	ldmia	r7, {r4-r5}	@ double
	cfmuld	mvd8, mvd0, mvd0
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfstrd	mvd8, [r6, #0]
	stmia	r8, {r4-r5}	@ double
	cfstrd	mvd0, [r7, #0]
	bge	.L460
	mov	r0, r0	@ nop
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	blt	.L462
.L460:
	ldr	r1, .L951+136
	ldr	r0, .L951+140
	cfldrd	mvd1, [r1, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r0, #0]
	ldr	r3, .L951+152
	ldr	r2, .L951+180
	cfmuld	mvd0, mvd1, mvd0
	cfstrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd1, [r3, #0]
	mov	sl, r1
	mov	r7, r3
	mov	r6, r2
	mov	r8, r0
.L465:
	cfldrd	mvd0, [r6, #0]
	ldmia	r7, {r4-r5}	@ double
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd0, mvd1
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfstrd	mvd8, [r6, #0]
	stmia	sl, {r4-r5}	@ double
	cfstrd	mvd0, [r7, #0]
	bge	.L463
	mov	r0, r0	@ nop
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	blt	.L465
.L463:
	ldr	r3, .L951+220
	ldr	r2, .L951+116
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bge	.L849
	mov	r0, r0	@ nop
	ldr	r3, .L951+120
	cfstrd	mvd0, [r3, #0]
.L468:
	ldr	r4, .L951+224
	ldr	r1, .L951+120
	ldr	r5, .L951+136
	ldmia	r1, {r2-r3}	@ double
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_ddiv
	ldmia	r5, {r2-r3}	@ double
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r4, {r0-r1}	@ double
	ldr	r6, .L951+168
	ldr	sl, .L951+152
	cfstrd	mvd8, [r6, #0]
	bl	__aeabi_ddiv
	cfldrd	mvd0, [r5, #0]
	ldr	r2, .L951+172
	ldr	ip, .L951+180
	ldr	r3, .L951+148
	cfmuld	mvd8, mvd0, mvd8
	stmia	r3, {r0-r1}	@ double
	cfstrd	mvd8, [ip, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd0, [r2, #0]
	mov	r8, r2
	mov	r7, ip
.L471:
	cfldrd	mvd0, [r7, #0]
	ldmia	r8, {r4-r5}	@ double
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd0, mvd1
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfsh64	mvdx9, mvdx0, #0	@ double
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfstrd	mvd8, [r7, #0]
	stmia	sl, {r4-r5}	@ double
	cfstrd	mvd0, [r8, #0]
	bge	.L469
	mov	r0, r0	@ nop
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	blt	.L471
.L469:
	ldr	r3, .L951+124
	ldr	r7, .L951+192
	cfldrd	mvd10, [r3, #0]
	ldr	sl, .L951+128
	ldr	fp, .L951+224
	ldr	r8, .L951+200
	ldr	r4, .L951+196
	ldr	r9, .L951+132
	ldmia	fp, {r2-r3}	@ double
	ldmia	r4, {r5-r6}	@ double
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	stmia	r7, {r5-r6}	@ double
	stmia	sl, {r5-r6}	@ double
	cfstrd	mvd9, [r8, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd10, [r9, #0]
	bl	__aeabi_dadd
	ldr	r3, .L951+136
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd8, [r3, #0]
	ldr	sl, .L951+164
	cfmuld	mvd1, mvd0, mvd8
	ldr	r7, .L951+140
	cfcmpd	r15, mvd1, mvd8
	mov	r0, r0	@ nop
	stmia	sl, {r0-r1}	@ double
	cfstrd	mvd1, [r7, #0]
	bgt	.L850
	ldr	r1, .L951+220
	ldmia	fp, {r2-r3}	@ double
	cfldrd	mvd0, [r1, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd0, mvd10
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfstrd	mvd0, [r9, #0]
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd1, mvd0, mvd8
	cfcmpd	r15, mvd1, mvd8
	mov	r0, r0	@ nop
	stmia	sl, {r0-r1}	@ double
	cfstrd	mvd1, [r7, #0]
	ble	.L905
.L474:
	ldr	r5, .L951+144
	ldr	r4, .L951+196
	cfldrd	mvd1, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L906
.L482:
	ldr	r3, .L951+148
	ldr	r2, .L951+152
	cfldrd	mvd1, [r3, #0]
	ldr	r3, .L951+156
	cfldrd	mvd2, [r2, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L951+160
	cfmuld	mvd0, mvd1, mvd0
	cfmuld	mvd1, mvd1, mvd2
	mov	r2, #120
	cfcmpd	r15, mvd1, mvd0
	str	r2, [r3, #0]
	bvc	.L488
	ldr	r2, .L951+164
	ldr	r3, .L951+168
	cfldrd	mvd1, [r2, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	ldr	r0, .L951+172
	ldr	r3, .L951+188
	cfmuld	mvd0, mvd0, mvd1
	cfstrd	mvd0, [r2, #0]
	ldmia	r3, {r1-r2}	@ double
	stmia	r0, {r1-r2}	@ double
.L488:
	ldr	r4, .L951+192
	ldr	r6, .L951+196
	cfldrd	mvd1, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L490
	mov	r0, r0	@ nop
	ldr	r5, .L951+172
	cfldrd	mvd0, [r5, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L907
.L490:
	ldr	r5, .L951+172
	ldr	r0, .L951+176
	ldmia	r5, {r2-r3}	@ double
	bl	printf
	ldmia	r5, {r3-r4}	@ double
	ldr	r2, .L951+180
	stmia	r2, {r3-r4}	@ double
	bl	TstPtUf
	ldmia	r5, {r1-r2}	@ double
	ldr	r3, .L951+184
	ldr	ip, .L951+188
	ldr	r0, [r3, #0]
	stmia	ip, {r1-r2}	@ double
	cmp	r0, #1
	beq	.L908
.L494:
	ldr	r3, .L951+192
	ldr	r2, .L951+196
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	ldr	r1, .L951+204
	cfcmpd	r15, mvd1, mvd0
	mov	r3, #4
	str	r3, [r1, #0]
	moveq	r3, #3
	streq	r3, [r1, #0]
	ldr	r2, .L951+196
	ldr	r3, .L951+200
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	ldreq	r2, .L951+204
	mov	r1, #1
	ldreq	r3, [r2, #0]
	subeq	r3, r3, #2
	streq	r3, [r2, #0]
	ldr	r3, .L951+204
	ldr	r2, [r3, #0]
	ldr	r3, .L951+208
	sub	r2, r2, #1
	str	r1, [r3, #0]
	cmp	r2, #3
	ldrls	pc, [pc, r2, asl #2]
	b	.L499
.L504:
	.word	.L500
	.word	.L501
	.word	.L499
	.word	.L503
.L209:
	ldr	r0, .L951+212
	bl	puts
	ldr	r0, .L951+216
	bl	puts
	ldr	r3, .L951+220
	ldr	r2, .L951+224
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L909
.L830:
	ldr	r1, .L951+228
	ldr	r0, .L951+232
	ldmia	r1, {r2-r3}	@ double
	bl	printf
	b	.L214
.L884:
	cfldrd	mvd1, [r9, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [fp, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bvs	.L278
	mov	r0, r0	@ nop
	ldr	ip, .L951+236
	cfmvrdl	r2, mvd2
	cfmvrdh	r3, mvd2
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_dadd
	stmia	r9, {r0-r1}	@ double
	b	.L628
.L839:
	ldr	r4, .L951+240
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	ldmia	r4, {r2-r3}	@ double
	bl	__aeabi_dadd
	bl	floor
	ldr	r3, [r7, #0]
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cmp	r3, #0
	stmia	r5, {r0-r1}	@ double
	ble	.L910
	cmp	r3, #1
	beq	.L379
.L863:
	str	fp, [r9, #0]
	b	.L838
.L899:
	cfldrd	mvd9, .L954
	b	.L399
.L955:
	.align	3
.L954:
	.word	0
	.word	-1074790400
	.word	E1
	.word	.LC160
	.word	.LC161
	.word	IEEE
	.word	UfNGrad
	.word	.LC174
	.word	.LC173
	.word	.LC175
	.word	.LC176
	.word	E0
	.word	.LC177
	.word	Y2
	.word	.LC178
	.word	.LC179
	.word	.LC180
	.word	.LC181
	.word	.LC182
	.word	Three
	.word	R
	.word	OneAndHalf
	.word	Eight
	.word	ThirtyTwo
	.word	.LC187
	.word	Exp2
	.word	TwoForty
	.word	F9
	.word	NoTrials
	.word	1023
	.word	BInvrse
	.word	.LC188
	.word	.LC189
	.word	.LC190
	.word	.LC191
	.word	.LC192
	.word	.LC193
	.word	.LC195
	.word	A1
	.word	Half
	.word	Q
	.word	C
	.word	Break
	.word	N
	.word	.LC197
	.word	.LC198
	.word	CInvrse
	.word	sigfpe
	.word	ovfl_buf
	.word	sigsave
	.word	.LC199
	.word	.LC200
	.word	.LC201
	.word	HInvrse
	.word	U2
	.word	.LC205
	.word	I
	.word	.LC206
	.word	.LC208
	.word	.LC209
	.word	.LC210
	.word	.LC211
	.word	.LC212
	.word	.LC65
	.word	V
	.word	.LC213
	.word	Zero
	.word	UfThold
	.word	U1
	.word	.LC66
	.word	.LC3
	.word	.LC214
	.word	.LC215
	.word	Milestone
	.word	Z
	.word	V9
	.word	Two
	.word	X
	.word	E9
	.word	Radix
	.word	.LC58
	.word	One
	.word	.LC216
	.word	.LC217
	.word	Indx
	.word	V0
	.word	W
	.word	Y
	.word	ErrCnt
	.word	.LC5
.L503:
	ldr	r3, .L954+268
	ldr	r2, .L954+160
	cfldrd	mvd9, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd9
	bne	.L507
	ldr	r6, .L954+44
	ldr	r3, .L954+8
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd8, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd0
	bne	.L507
	mov	r0, r0	@ nop
	ldr	ip, .L954+312
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dsub
	mov	r4, r0
	bic	r5, r1, #-2147483648
	cfmvdlr	mvd2, r4
	cfmvdhr	mvd2, r5
	cfcmpd	r15, mvd8, mvd2
	beq	.+12
	bvs	.+8
	b	.L507
	ldr	r3, .L954+24
	mov	r2, #0
	str	r2, [r3, #0]
	ldr	r0, .L954+12
	bl	puts
	ldr	r0, .L954+16
	bl	puts
	ldr	r4, .L954+216
	ldr	r3, .L954+84
	ldr	ip, .L954+184
	ldmia	r3, {r0-r1}	@ double
	ldmia	r4, {r2-r3}	@ double
	cfldrd	mvd9, [ip, #0]
	bl	__aeabi_dadd
	ldmia	r4, {r2-r3}	@ double
	cfldrd	mvd10, [r6, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	ip, .L954+324
	cfmuld	mvd8, mvd10, mvd9
	ldmia	ip, {r0-r1}	@ double
	cfmuld	mvd8, mvd8, mvd0
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	ip, .L954+308
	cfmuld	mvd0, mvd0, mvd9
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfstrd	mvd0, [ip, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_ddiv
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	r3, .L954+348
	cfcmpd	r15, mvd0, mvd10
	stmia	r3, {r0-r1}	@ double
	ldr	r3, .L954+20
	movne	r2, #0
	moveq	r2, #1
	str	r2, [r3, #0]
.L499:
	ldr	r3, .L954+24
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bne	.L507
.L511:
	ldr	r4, .L954+268
	ldr	r1, .L954+28
	ldmia	r4, {r2-r3}	@ double
	ldr	r0, .L954+32
	str	r1, [sp, #0]
	bl	printf
	ldr	r0, .L954+36
	bl	printf
	ldr	r0, .L954+40
	bl	puts
	ldr	r3, .L954+272
	cfldrd	mvd2, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd1, mvd1
	cfmuld	mvd3, mvd0, mvd0
	cfmuld	mvd1, mvd3, mvd1
	ldr	r3, .L954+348
	ldr	r2, .L954+52
	cfcmpd	r15, mvd1, mvd2
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfstrd	mvd3, [r3, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd1, [r2, #0]
	bgt	.L519
	mov	r0, r0	@ nop
	ldr	r3, .L954+44
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd3, mvd0
	bvs	.L911
	ldr	ip, .L954+352
	ldr	r2, .L954+276
	ldr	r3, [ip, #4]
	ldr	r0, .L954+280
	add	r3, r3, #1
	str	r3, [ip, #4]
	ldr	r1, .L954+320
	bl	printf
	ldr	r3, .L954+224
	mov	r2, #4
	str	r2, [r3, #0]
.L523:
	ldr	r3, .L954+224
	ldr	r0, .L954+48
	ldr	r1, [r3, #0]
	bl	printf
.L519:
	ldr	r3, .L954+268
	mov	ip, #130
	ldmia	r3, {r0-r1}	@ double
	ldr	r3, .L954+292
	ldr	r2, .L954+156
	str	ip, [r3, #0]
	ldmia	r2, {r4-r5}	@ double
	bl	log
	ldr	r6, .L954+104
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfldrd	mvd0, [r6, #0]
	ldr	r8, .L954+212
	cfmuld	mvd8, mvd8, mvd0
	ldmia	r8, {r0-r1}	@ double
	bl	log
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	bl	floor
	ldmia	r6, {r2-r3}	@ double
	add	r1, r1, #-2147483648
	bl	__aeabi_ddiv
	ldr	r6, .L954+348
	mov	r4, r0
	mov	r5, r1
	mov	r2, r0
	mov	r3, r1
	stmia	r6, {r4-r5}	@ double
	bl	__aeabi_dadd
	ldr	r7, .L954+52
	stmia	r7, {r0-r1}	@ double
	ldr	r0, .L954+56
	bl	puts
	ldmia	r8, {r2-r3}	@ double
	ldmia	r6, {r4-r5}	@ double
	ldr	r0, .L954+60
	stmia	sp, {r4-r5}	@ double
	bl	printf
	ldmia	r8, {r2-r3}	@ double
	ldmia	r7, {r4-r5}	@ double
	ldr	r0, .L954+64
	stmia	sp, {r4-r5}	@ double
	bl	printf
	ldr	r0, .L954+68
	bl	printf
	ldr	r0, .L954+192
	bl	_setjmp
	subs	r8, r0, #0
	beq	.L524
	ldr	r4, .L954+352
	ldr	r3, .L954+196
	ldr	ip, [r4, #4]
	mov	lr, #0
	add	ip, ip, #1
	ldr	r1, .L954+320
	ldr	r2, .L954+72
	ldr	r0, .L954+280
	str	lr, [r3, #0]
	str	ip, [r4, #4]
	bl	printf
.L525:
	ldr	r3, .L954+292
	mov	r2, #140
	str	r2, [r3, #0]
	mov	r0, #10
	bl	putchar
	ldr	r3, .L954+304
	ldr	r2, .L954+76
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r2, #0]
	ldr	fp, .L954+308
	ldr	r0, .L954+160
	ldr	r2, .L954+264
	ldr	r1, .L954+348
	ldmia	r2, {r3-r4}	@ double
	cfmuld	mvd0, mvd0, mvd1
	stmia	r0, {r3-r4}	@ double
	stmia	fp, {r3-r4}	@ double
	ldr	r3, .L954+172
	cfstrd	mvd0, [r1, #0]
	mov	r1, #0
	str	r1, [r3, #0]
	ldr	r3, .L954+224
	mov	r2, #2
	ldr	r9, .L954+80
	ldr	r6, .L954+348
	str	r2, [r3, #0]
	mov	sl, r0
	mov	r8, fp
	mov	r7, r3
.L530:
	ldr	ip, [r7, #0]
	ldmia	r6, {r0-r1}	@ double
	add	ip, ip, #1
	mov	r3, ip, asl #1
	cfmv64lr	mvdx0, r3
	cfcvt32d	mvd0, mvfx0
	str	ip, [r7, #0]
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	bl	__aeabi_ddiv
	ldmia	sl, {r2-r3}	@ double
	mov	r4, r0
	mov	r5, r1
	stmia	r6, {r4-r5}	@ double
	bl	__aeabi_dadd
	cfldrd	mvd8, [r8, #0]
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	stmia	r9, {r4-r5}	@ double
	bl	__aeabi_dadd
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	mov	r2, r0
	mov	r3, r1
	cfstrd	mvd9, [r8, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dadd
	cfcmpd	r15, mvd9, mvd8
	stmia	sl, {r0-r1}	@ double
	bvs	.L530
	ldr	r3, .L954+84
	ldr	r1, .L954+88
	cfldrd	mvd8, [r3, #0]
	ldmia	r1, {r2-r3}	@ double
	ldr	r4, .L954+324
	ldr	r6, .L954+100
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_ddiv
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dadd
	ldr	r3, .L954+92
	mov	r4, r0
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd8, mvd0
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r5, r1
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	ip, .L954+296
	cfmuld	mvd8, mvd0, mvd0
	ldr	r3, .L954+108
	ldr	r1, .L954+272
	cfmuld	mvd8, mvd8, mvd8
	ldmia	r3, {r4-r5}	@ double
	cfstrd	mvd0, [ip, #0]
	ldmia	r1, {r2-r3}	@ double
	stmia	fp, {r4-r5}	@ double
	mov	r1, r5
	mov	r0, r4
	cfstrd	mvd8, [r6, #0]
	bl	__aeabi_dsub
	ldr	r5, .L954+348
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	stmia	r5, {r0-r1}	@ double
	ldr	r7, .L954+224
	ldr	r0, .L954+96
	bl	printf
	ldr	sl, .L954+308
	mov	r3, #1
	ldr	fp, .L954+324
	str	r3, [r7, #0]
.L856:
	ldr	r8, .L954+120
	ldmia	sl, {r0-r1}	@ double
	ldmia	r8, {r2-r3}	@ double
	bl	__aeabi_dsub
	ldmia	fp, {r4-r5}	@ double
	ldmia	sl, {r2-r3}	@ double
	mov	r8, r0
	mov	r9, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	ldr	ip, .L954+120
	mov	r7, r1
	ldmia	ip, {r2-r3}	@ double
	mov	r6, r0
	mov	r1, r5
	mov	r0, r4
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_ddiv
	ldr	lr, .L954+296
	mov	r4, r0
	mov	r5, r1
	stmia	lr, {r4-r5}	@ double
	ldr	r4, .L954+100
	mov	r2, r0
	mov	r3, r1
	ldmia	sl, {r0-r1}	@ double
	bl	pow
	ldmia	r4, {r2-r3}	@ double
	bl	__aeabi_dsub
	ldr	r7, .L954+104
	ldr	r8, .L954+216
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r8, #0]
	mov	ip, r1
	bic	r2, ip, #-2147483648
	mov	r1, r0
	cfmuld	mvd0, mvd0, mvd1
	cfmvdlr	mvd1, r1
	cfmvdhr	mvd1, r2
	mov	r3, r0
	ldr	r0, .L954+160
	mov	r4, ip
	cfcmpd	r15, mvd1, mvd0
	stmia	r0, {r3-r4}	@ double
	bvs	.L912
	ldr	r9, .L954+348
	ldmia	sl, {r2-r3}	@ double
	ldmia	r9, {r4-r5}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	ldr	r3, .L954+304
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd1, mvd0
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	stmia	r9, {r0-r1}	@ double
	ldr	r1, .L954+108
	mov	r0, r4
	ldmia	r1, {r2-r3}	@ double
	stmia	sl, {r4-r5}	@ double
	mov	r1, r5
	bl	__aeabi_dsub
	ldmia	fp, {r2-r3}	@ double
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd0, mvd0
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	bl	__aeabi_dadd
	cfldrd	mvd1, [fp, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	ip, .L954+296
	cfcmpd	r15, mvd0, mvd1
	mov	r0, r0	@ nop
	ldr	lr, .L954+224
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	cfstrd	mvd0, [ip, #0]
	bvc	.L534
	ldr	r3, .L954+112
	ldr	r2, [lr, #0]
	ldr	ip, [r3, #0]
	add	r3, r2, #1
	cmp	r2, ip
	strlt	r3, [lr, #0]
	blt	.L856
	mov	r0, r0	@ nop
.L534:
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	blt	.L913
	ldr	lr, .L954+216
	ldmia	lr, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldr	r2, .L954+216
	mov	r4, r0
	mov	r5, r1
	stmia	sl, {r4-r5}	@ double
	ldmia	r2, {r0-r1}	@ double
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dadd
	ldr	r3, .L954+224
	mov	r2, #1
	str	r2, [r3, #0]
	ldr	r3, .L954+348
	stmia	r3, {r0-r1}	@ double
	b	.L856
.L848:
	ldr	r3, [r6, #0]
	cfstrd	mvd1, [r7, #0]
	cmp	r3, #0
	beq	.L450
	b	.L449
.L847:
	ldr	r3, [r6, #0]
	cfstrd	mvd1, [r7, #0]
	cmp	r3, #0
	str	fp, [r5, #0]
	bne	.L445
	ldmia	sl, {r3-r4}	@ double
	stmia	r9, {r3-r4}	@ double
	bl	SR3980
	ldr	r3, [r5, #0]
	cmp	r3, #10
	bgt	.L442
.L903:
	ldr	ip, .L954+116
	str	ip, [r5, #0]
	bl	SR3980
	b	.L442
.L912:
	ldr	ip, .L954+172
	ldr	r1, .L954+120
	mov	r4, #1
	ldmia	r1, {r6-r7}	@ double
	str	r4, [ip, #0]
	mov	r2, r6
	mov	r3, r7
	ldmia	sl, {r0-r1}	@ double
	bl	__aeabi_dsub
	mov	r2, r6
	ldr	r6, .L954+324
	mov	r4, r0
	mov	r5, r1
	mov	r3, r7
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	ldr	ip, .L954+352
	ldr	r6, .L954+300
	ldr	r3, [ip, #8]
	ldr	r7, .L954+296
	add	r3, r3, #1
	str	r3, [ip, #8]
	stmia	r6, {r0-r1}	@ double
	ldr	r2, .L954+124
	ldr	r1, .L954+356
	ldr	r0, .L954+280
	bl	printf
	ldmia	r7, {r2-r3}	@ double
	ldmia	sl, {r0-r1}	@ double
	bl	pow
	ldr	r8, .L954+160
	mov	r3, r1
	mov	r2, r0
	ldr	r0, .L954+128
	bl	printf
	ldmia	r6, {r2-r3}	@ double
	ldmia	r7, {r4-r5}	@ double
	ldr	r0, .L954+132
	stmia	sp, {r4-r5}	@ double
	bl	printf
	ldmia	r8, {r2-r3}	@ double
	ldr	r0, .L954+136
	bl	printf
	ldr	r0, .L954+140
	bl	puts
	ldr	r0, .L954+144
	bl	puts
.L533:
	ldr	r3, .L954+292
	mov	r2, #150
	str	r2, [r3, #0]
	ldr	r0, .L954+148
	bl	puts
	ldr	r8, .L954+152
	ldr	r4, .L954+164
	ldr	r3, .L954+172
	ldr	r9, .L954+296
	ldr	r2, .L954+156
	mov	sl, #0
	str	sl, [r3, #0]
	ldmia	r4, {r0-r1}	@ double
	ldmia	r8, {r3-r4}	@ double
	stmia	r9, {r3-r4}	@ double
	ldmia	r2, {r6-r7}	@ double
	bl	log
	mov	r4, r0
	mov	r5, r1
	ldmia	r8, {r0-r1}	@ double
	bl	log
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	bl	floor
	ldr	r3, .L954+160
	ldr	r2, .L954+168
	stmia	r3, {r0-r1}	@ double
	str	sl, [r2, #0]
	ldr	r8, .L954+308
	ldr	r7, .L954+348
	ldr	fp, .L954+324
	ldr	sl, .L954+164
	mov	r6, r3
.L542:
	ldr	ip, .L954+184
	ldmia	r6, {r2-r3}	@ double
	ldmia	ip, {r4-r5}	@ double
	ldmia	r9, {r0-r1}	@ double
	stmia	r8, {r4-r5}	@ double
	bl	pow
	stmia	r7, {r0-r1}	@ double
	bl	IsYeqX
	ldmia	sl, {r4-r5}	@ double
	ldmia	r9, {r0-r1}	@ double
	ldr	r3, [r6, #4]
	stmia	r8, {r4-r5}	@ double
	add	r3, r3, #-2147483648
	str	r3, [r6, #4]
	ldmia	r6, {r2-r3}	@ double
	bl	pow
	stmia	r7, {r0-r1}	@ double
	bl	IsYeqX
	cfldrd	mvd1, [r9, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [fp, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bge	.L858
	ldr	r3, .L954+168
	mov	r2, #1
	str	r2, [r3, #0]
.L541:
	bl	PrintIfNPositive
	ldr	r3, .L954+172
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L914
.L543:
	mov	r0, #10
	bl	putchar
	ldr	r3, .L954+292
	mov	r2, #160
	str	r2, [r3, #0]
	bl	Pause
	ldr	r0, .L954+176
	bl	puts
	ldr	r0, .L954+180
	bl	puts
	ldr	r2, .L954+184
	ldr	r1, .L954+188
	ldr	r3, [r2, #4]
	ldr	r4, [r2, #0]
	add	r5, r3, #-2147483648
	ldr	r3, .L954+212
	cfmvdlr	mvd1, r4
	cfmvdhr	mvd1, r5
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L954+300
	cfmuld	mvd0, mvd1, mvd0
	cfstrd	mvd0, [r3, #0]
	ldr	r2, .L954+348
	ldr	r3, .L954+196
	ldr	r0, .L954+192
	str	r1, [r3, #0]
	stmia	r2, {r4-r5}	@ double
	bl	_setjmp
	cmp	r0, #0
	beq	.L544
	ldr	r3, .L954+224
	mov	r1, #0
	str	r1, [r3, #0]
	ldr	r2, .L954+348
	ldr	r1, .L954+300
	ldmia	r2, {r3-r4}	@ double
	stmia	r1, {r3-r4}	@ double
.L545:
	ldr	r3, .L954+196
	mov	ip, #0
	str	ip, [r3, #0]
	ldr	r3, .L954+300
	ldr	r8, .L954+348
	ldmia	r3, {r1-r2}	@ double
	ldr	r3, .L954+296
	ldr	r0, .L954+200
	stmia	r3, {r1-r2}	@ double
	bl	puts
	ldmia	r8, {r2-r3}	@ double
	ldr	r0, .L954+204
	bl	printf
	ldmia	r8, {r2-r3}	@ double
	ldr	sl, [r8, #4]
	ldr	fp, [r8, #0]
	ldr	r1, .L954+256
	add	sl, sl, #-2147483648
	ldr	ip, .L954+300
	ldmia	r1, {r8-r9}	@ double
	str	r8, [sp, #80]
	str	r9, [sp, #84]
	add	r0, sp, #80
	ldmia	r0, {r0-r1}
	mov	r8, fp
	mov	r9, sl
	stmia	ip, {r8-r9}	@ double
	ldr	ip, .L954+340
	mov	r4, fp
	mov	r5, sl
	stmia	ip, {r4-r5}	@ double
	bl	__aeabi_dsub
	add	r2, sp, #80
	ldmia	r2, {r2-r3}
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	mov	r0, fp
	mov	r1, sl
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bne	.L859
	ldr	r4, .L954+296
	ldr	r6, .L954+348
	ldr	r0, .L954+208
	bl	puts
	cfldrd	mvd1, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L915
.L549:
	ldr	r3, .L954+224
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L551
	ldr	r3, .L954+212
	ldr	r2, .L954+216
	cfldrd	mvd9, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd11, [r2, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd9, mvd11
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dsub
	ldr	r3, .L954+256
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfldrd	mvd10, [r3, #0]
	ldr	ip, .L954+324
	ldr	r4, .L954+348
	cfmuld	mvd8, mvd8, mvd10
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	ldmia	ip, {r0-r1}	@ double
	cfstrd	mvd8, [r4, #0]
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd0, mvd11
	cfmuld	mvd0, mvd0, mvd10
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	ldr	r3, .L954+340
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L954+296
	cfcmpd	r15, mvd1, mvd0
	stmia	r3, {r0-r1}	@ double
	stmltia	r4, {r0-r1}	@ double
.L552:
	ldr	r3, .L954+348
	ldr	r2, .L954+340
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bge	.L554
	mov	r0, r0	@ nop
	ldr	r3, .L954+256
	cfstrd	mvd1, [r3, #0]
.L554:
	ldr	r3, .L954+340
	ldr	r4, .L954+256
	cfldrd	mvd8, [r3, #0]
	ldmia	r4, {r2-r3}	@ double
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bvs	.L916
.L556:
	ldr	r1, .L954+256
	ldr	r0, .L954+220
	ldmia	r1, {r2-r3}	@ double
	bl	printf
	ldr	r3, .L954+224
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L558
	ldr	r1, .L954+340
	ldr	r0, .L954+228
	ldmia	r1, {r2-r3}	@ double
	bl	printf
.L559:
	ldr	r6, .L954+256
	ldr	r4, .L954+324
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r4, #0]
	ldr	r7, .L954+300
	cfmuld	mvd1, mvd1, mvd0
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	cfstrd	mvd1, [r7, #0]
	ldr	r0, .L954+232
	bl	printf
	ldmia	r4, {r2-r3}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_ddiv
	mov	r5, r1
	mov	r4, r0
	mov	r2, r0
	mov	r3, r1
	stmia	r7, {r4-r5}	@ double
	ldr	r0, .L954+236
	bl	printf
	ldr	r0, .L954+240
	bl	puts
	ldr	r0, .L954+244
	bl	puts
	ldmia	r6, {r6-r7}	@ double
	mov	r4, r6
	add	r5, r7, #-2147483648
	cfmvdlr	mvd0, r6
	cfmvdhr	mvd0, r7
	cfmvdlr	mvd1, r4
	cfmvdhr	mvd1, r5
	ldr	r3, .L954+292
	mov	r2, #170
	cfcmpd	r15, mvd0, mvd1
	str	r2, [r3, #0]
	bvc	.L560
	ldr	r0, .L954+340
	ldmia	r0, {r1-r2}	@ double
	mov	r3, r1
	add	r4, r2, #-2147483648
	cfmvdlr	mvd2, r1
	cfmvdhr	mvd2, r2
	cfmvdlr	mvd0, r3
	cfmvdhr	mvd0, r4
	cfcmpd	r15, mvd2, mvd0
	bvs	.L917
.L560:
	ldr	ip, .L954+352
	ldr	r2, .L954+248
	ldr	r3, [ip, #0]
	ldr	r1, .L954+252
	add	r3, r3, #1
	str	r3, [ip, #0]
	ldr	r0, .L954+280
	bl	printf
	ldr	r1, .L954+256
	ldr	r0, .L954+260
	ldmia	r1, {r2-r3}	@ double
	ldr	r1, .L954+340
	ldmia	r1, {r4-r5}	@ double
	stmia	sp, {r4-r5}	@ double
	ldr	r1, .L954+268
	ldmia	r1, {r4-r5}	@ double
	str	r4, [sp, #8]
	str	r5, [sp, #12]
	bl	printf
.L564:
	ldr	r3, .L954+292
	mov	r2, #175
	str	r2, [r3, #0]
	mov	r0, #10
	bl	putchar
	ldr	r3, .L954+336
	mov	r2, #1
	ldr	r6, .L954+296
	ldr	r7, .L954+264
	ldr	r8, .L954+300
	ldr	sl, .L954+348
	ldr	r9, .L954+324
	ldr	fp, .L954+316
	str	r2, [r3, #0]
	b	.L576
.L569:
	ldr	r0, .L954+336
	ldr	r3, [r0, #0]
	add	r2, r3, #1
	cmp	r2, #3
	str	r2, [r0, #0]
	bgt	.L918
.L576:
	cmp	r2, #2
	beq	.L567
	cmp	r2, #3
	beq	.L568
	cmp	r2, #1
	ldreq	r0, .L954+268
	ldmeqia	r0, {r3-r4}	@ double
	stmeqia	r6, {r3-r4}	@ double
.L565:
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	beq	.L569
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	bl	sqrt
	ldmia	r9, {r4-r5}	@ double
	ldr	r3, .L954+312
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd2, [fp, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd1, mvd1
	cfmuld	mvd10, mvd2, mvd0
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	cfstrd	mvd1, [r8, #0]
	mov	r0, r4
	mov	r1, r5
	cfstrd	mvd8, [sl, #0]
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_ddiv
	cfldrd	mvd9, [r6, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd9
	blt	.L571
	mov	r0, r4
	mov	r1, r5
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd9, mvd0
	cfcmpd	r15, mvd8, mvd0
	bvc	.L569
.L571:
	ldr	r3, .L954+272
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bvc	.L860
	ldr	ip, .L954+352
	ldr	r1, .L954+320
	ldr	r3, [ip, #4]
	ldr	r2, .L954+276
	add	r3, r3, #1
	ldr	r0, .L954+280
	str	r3, [ip, #4]
	bl	printf
.L575:
	ldmia	r6, {r2-r3}	@ double
	ldr	r0, .L954+284
	bl	printf
	ldmia	sl, {r2-r3}	@ double
	ldr	r0, .L954+288
	bl	printf
	ldr	r0, .L954+336
	ldr	r3, [r0, #0]
	add	r2, r3, #1
	cmp	r2, #3
	str	r2, [r0, #0]
	ble	.L576
.L918:
	ldr	r3, .L954+292
	mov	r1, #1
	mov	r2, #180
	ldr	r5, .L954+296
	ldr	r9, .L954+300
	ldr	r6, .L954+324
	ldr	fp, .L954+316
	ldr	r8, .L954+312
	ldr	r7, .L954+308
	ldr	sl, .L954+304
	str	r2, [r3, #0]
	str	r1, [r0, #0]
	b	.L585
.L921:
	ldr	r3, [ip, #4]
	ldr	r1, .L954+320
	add	r3, r3, #1
	str	r3, [ip, #4]
	bl	printf
.L584:
	ldmia	r5, {r2-r3}	@ double
	ldr	r0, .L954+328
	bl	printf
	ldr	r1, .L954+348
	ldr	r0, .L954+332
	ldmia	r1, {r2-r3}	@ double
	bl	printf
.L580:
	ldr	r2, .L954+336
	ldr	r3, [r2, #0]
	add	r1, r3, #1
	cmp	r1, #2
	str	r1, [r2, #0]
	bgt	.L919
.L585:
	cmp	r1, #1
	beq	.L920
	ldr	lr, .L954+340
	ldmia	lr, {r3-r4}	@ double
	stmia	r5, {r3-r4}	@ double
.L578:
	ldmia	r5, {r0-r1}	@ double
	bl	sqrt
	cfldrd	mvd8, [fp, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd9, [r8, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd8, mvd9
	cfmvdlr	mvd10, r0
	cfmvdhr	mvd10, r1
	ldmia	r6, {r0-r1}	@ double
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	bl	__aeabi_dsub
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	ldmia	r6, {r0-r1}	@ double
	cfmuld	mvd1, mvd10, mvd1
	cfmuld	mvd0, mvd0, mvd8
	cfmuld	mvd0, mvd0, mvd9
	cfmuld	mvd8, mvd1, mvd10
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfstrd	mvd1, [r7, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd8, [r9, #0]
	bl	__aeabi_dsub
	cfldrd	mvd9, [r5, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd0, mvd9
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	blt	.L579
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd9
	bvc	.L580
.L579:
	ldr	r3, .L954+344
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r3, #0]
	ldr	r3, .L954+348
	cfcmpd	r15, mvd0, mvd1
	ldr	ip, .L954+352
	ldr	r1, .L954+356
	ldr	r2, .L956
	ldr	r0, .L956+4
	cfstrd	mvd8, [r3, #0]
	blt	.L921
	ldr	r3, [ip, #8]
	ldr	r2, .L956
	add	r3, r3, #1
	str	r3, [ip, #8]
	ldr	r0, .L956+4
	bl	printf
	b	.L584
.L858:
	ldr	lr, .L956+8
	ldr	r0, .L956+12
	ldr	r2, [lr, #0]
	ldmia	r0, {r3-r4}	@ double
	cmp	r2, #0
	stmia	r9, {r3-r4}	@ double
	beq	.L542
	b	.L541
.L568:
	ldr	r2, .L956+16
	ldmia	r2, {r3-r4}	@ double
	stmia	r6, {r3-r4}	@ double
	b	.L565
.L567:
	ldr	r1, .L956+20
	ldmia	r1, {r3-r4}	@ double
	stmia	r6, {r3-r4}	@ double
	b	.L565
.L860:
	ldr	ip, .L956+24
	ldr	r1, .L956+28
	ldr	r3, [ip, #8]
	ldr	r2, .L956
	add	r3, r3, #1
	str	r3, [ip, #8]
	ldr	r0, .L956+4
	bl	printf
	b	.L575
.L920:
	ldr	ip, .L956+32
	ldmia	ip, {r3-r4}	@ double
	stmia	r5, {r3-r4}	@ double
	b	.L578
.L919:
	ldr	r3, .L956+36
	mov	r2, #190
	str	r2, [r3, #0]
	bl	Pause
	ldr	r3, .L956+40
	ldr	r2, .L956+32
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L956+44
	cfmuld	mvd8, mvd1, mvd0
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L956+48
	cfmuld	mvd1, mvd0, mvd0
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd2, mvd1, mvd8
	ldr	r3, .L956+52
	ldr	r2, .L956+56
	cfcmpd	r15, mvd2, mvd0
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfstrd	mvd8, [r3, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd1, [r2, #0]
	blt	.L586
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd8
	bge	.L587
.L586:
	ldr	r3, .L956+60
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd2, mvd0
	mov	r0, r0	@ nop
	blt	.L589
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	bl	__aeabi_ddiv
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bvc	.L862
.L589:
	ldr	ip, .L956+24
	ldr	r1, .L956+28
	ldr	r3, [ip, #8]
	ldr	r2, .L956+64
	add	r3, r3, #1
	ldr	r0, .L956+4
	str	r3, [ip, #8]
	bl	printf
.L592:
	ldr	r1, .L956+52
	ldr	r0, .L956+68
	ldmia	r1, {r2-r3}	@ double
	ldr	r1, .L956+72
	str	r1, [sp, #0]
	bl	printf
.L587:
	ldr	r0, .L956+76
	ldr	r3, .L956+36
	mov	r1, #200
	mov	r2, #1
	str	r1, [r3, #0]
	str	r2, [r0, #0]
.L605:
	ldr	r0, .L956+76
	ldr	r4, .L956+80
	ldr	r3, [r0, #0]
	ldr	r5, .L956+52
	sub	r3, r3, #2
	ldmia	r4, {r1-r2}	@ double
	stmia	r5, {r1-r2}	@ double
	cmp	r3, #3
	ldrls	pc, [pc, r3, asl #2]
	b	.L593
.L598:
	.word	.L594
	.word	.L595
	.word	.L596
	.word	.L597
.L597:
	ldr	lr, .L956+44
	ldr	r0, .L956+52
	ldmia	lr, {r3-r4}	@ double
	stmia	r0, {r3-r4}	@ double
.L593:
	ldr	r2, .L956+84
	ldr	r1, .L956+88
	ldr	r5, .L956+52
	str	r2, [r1, #0]
	ldr	r2, .L956+56
	ldmia	r5, {r3-r4}	@ double
	ldr	r0, .L956+404
	stmia	r2, {r3-r4}	@ double
	bl	_setjmp
	cmp	r0, #0
	bne	.L922
	ldr	r3, .L956+348
	ldr	r2, .L956+56
	ldr	r6, .L956+52
	ldmia	r3, {r4-r5}	@ double
	ldmia	r2, {r0-r1}	@ double
	ldmia	r6, {r2-r3}	@ double
	bl	__aeabi_ddiv
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	mov	r3, r5
	mov	r2, r4
	bl	__aeabi_dsub
	ldr	r3, .L956+416
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L956+92
	cfcmpd	r15, mvd1, mvd0
	stmia	r3, {r0-r1}	@ double
	beq	.L601
	ldr	r2, .L956+60
	ldr	r3, [r2, #4]
	ldr	r7, [r2, #0]
	add	r3, r3, #-2147483648
	str	r7, [sp, #24]
	str	r3, [sp, #28]
	cfldrd	mvd0, [sp, #24]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L602
	ldr	r0, .L956+76
	ldr	r3, [r0, #0]
	cmp	r3, #4
	ble	.L923
.L602:
	ldr	ip, .L956+24
	ldr	r0, .L956+4
	ldr	r3, [ip, #4]
	ldr	r1, .L956+496
	add	r3, r3, #1
	ldr	r2, .L956
	str	r3, [ip, #4]
	bl	printf
.L604:
	ldr	r1, .L956+52
	ldr	r0, .L956+96
	ldmia	r1, {r2-r3}	@ double
	bl	printf
	ldr	r1, .L956+92
	ldr	r0, .L956+100
	ldmia	r1, {r2-r3}	@ double
	bl	printf
.L600:
	ldr	r2, .L956+88
	mov	r3, #0
	str	r3, [r2, #0]
.L601:
	ldr	r4, .L956+76
	ldr	r3, [r4, #0]
	add	r3, r3, #1
	cmp	r3, #5
	str	r3, [r4, #0]
	ble	.L605
	ldr	r3, .L956+36
	mov	r1, #210
	ldr	r2, .L956+416
	str	r1, [r3, #0]
	ldr	r1, .L956+104
	ldmia	r2, {r3-r4}	@ double
	mov	r0, #10
	stmia	r1, {r3-r4}	@ double
	bl	putchar
	ldr	r0, .L956+108
	bl	puts
	ldr	r2, .L956+84
	ldr	r3, .L956+88
	ldr	r0, .L956+112
	str	r2, [r3, #0]
	bl	printf
	ldr	r0, .L956+404
	bl	_setjmp
	cmp	r0, #0
	beq	.L924
.L606:
	ldr	r2, .L956+84
	ldr	r3, .L956+88
	ldr	r0, .L956+116
	str	r2, [r3, #0]
	bl	printf
	ldr	r0, .L956+404
	bl	_setjmp
	cmp	r0, #0
	beq	.L925
.L607:
	ldr	r3, .L956+88
	mov	r2, #0
	str	r2, [r3, #0]
	ldr	r3, .L956+36
	mov	r1, #220
	str	r1, [r3, #0]
	bl	Pause
	mov	r0, #10
	bl	putchar
	ldr	r3, .L956+24
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bne	.L926
	ldr	r3, .L956+24
	ldr	r2, [r3, #4]
	cmp	r2, #0
	bne	.L927
.L609:
	ldr	r3, .L956+24
	ldr	r2, [r3, #8]
	cmp	r2, #0
	bne	.L928
.L610:
	ldr	r3, .L956+24
	ldr	r2, [r3, #12]
	cmp	r2, #0
	bne	.L929
.L611:
	ldr	r4, .L956+24
	mov	r0, #10
	bl	putchar
	ldmia	r4, {r0, r3}	@ phole ldm
	ldr	r2, [r4, #8]
	add	r1, r0, r3
	ldr	ip, [r4, #12]
	add	r2, r1, r2
	add	r3, r2, ip
	cmp	r3, #0
	ble	.L612
	cmp	r2, #0
	bne	.L613
	cmp	ip, #0
	ble	.L613
	ldr	r0, .L956+120
	bl	printf
	ldr	r0, .L956+124
	bl	puts
	ldmia	r4, {r0, r3}	@ phole ldm
	add	r1, r0, r3
.L613:
	cmp	r1, #0
	bne	.L614
	ldr	r4, .L956+24
	ldr	r3, [r4, #8]
	cmp	r3, #0
	ble	.L615
	ldr	r0, .L956+128
	bl	puts
	ldr	r0, .L956+132
	bl	puts
	ldmia	r4, {r0, r3}	@ phole ldm
	add	r1, r0, r3
.L614:
	cmp	r1, #0
	ble	.L615
	ldr	r0, .L956+136
	bl	printf
	ldr	r0, .L956+140
	bl	puts
	ldr	r3, .L956+24
	ldr	r0, [r3, #0]
.L615:
	cmp	r0, #0
	ble	.L616
	ldr	r0, .L956+144
	bl	printf
	ldr	r0, .L956+148
	bl	puts
.L616:
	ldr	r3, .L956+152
	ldr	r1, [r3, #0]
	cmp	r1, #0
	ldrne	r0, .L956+156
	blne	printf
.L627:
	ldr	r0, .L956+160
	bl	puts
	mov	r0, #0
	add	sp, sp, #92
	cfldrd	mvd8, [sp], #8
	cfldrd	mvd9, [sp], #8
	cfldrd	mvd10, [sp], #8
	cfldrd	mvd11, [sp], #8
	cfldrd	mvd12, [sp], #8
	cfldrd	mvd13, [sp], #8
	cfldrd	mvd14, [sp], #8
	cfldrd	mvd15, [sp], #8
	ldmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	bx	lr
.L596:
	ldr	fp, .L956+40
	ldr	ip, .L956+52
	ldmia	fp, {r3-r4}	@ double
	stmia	ip, {r3-r4}	@ double
	b	.L593
.L595:
	ldr	r9, .L956+32
	ldr	sl, .L956+52
	ldmia	r9, {r3-r4}	@ double
	stmia	sl, {r3-r4}	@ double
	b	.L593
.L594:
	ldr	r6, .L956+48
	ldr	r7, .L956+616
	ldmia	r6, {r0-r1}	@ double
	ldmia	r7, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldr	r8, .L956+52
	stmia	r8, {r0-r1}	@ double
	b	.L593
.L922:
	ldmia	r5, {r2-r3}	@ double
	ldr	r0, .L956+164
	bl	printf
	b	.L600
.L923:
	ldr	ip, .L956+24
	ldr	r1, .L956+420
	ldr	r3, [ip, #12]
	ldr	r2, .L956
	add	r3, r3, #1
	str	r3, [ip, #12]
	ldr	r0, .L956+4
	bl	printf
	b	.L604
.L524:
	ldr	ip, .L956+168
	ldr	r7, .L956+88
	ldr	r1, .L956+384
	ldr	r4, .L956+84
	ldmia	r1, {r2-r3}	@ double
	str	r4, [r7, #0]
	ldmia	ip, {r0-r1}	@ double
	bl	pow
	ldr	r6, .L956+92
	mov	r4, r0
	mov	r5, r1
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L956+172
	str	r8, [r7, #0]
	stmia	r6, {r4-r5}	@ double
	bl	printf
	ldr	r3, .L956+416
	cfldrd	mvd8, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd0
	beq	.+12
	bvs	.+8
	b	.L526
	ldr	r3, .L956+44
	ldr	r6, .L956+40
	ldmia	r3, {r0-r1}	@ double
	ldr	r3, .L956+176
	mov	r2, r0
	ldmia	r3, {r4-r5}	@ double
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dadd
	cfldrd	mvd9, [r6, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd0, mvd9
	cfcmpd	r15, mvd8, mvd0
	bgt	.L526
	ldr	ip, .L956+48
	mov	r0, r4
	mov	r1, r5
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd9, mvd0
	cfcmpd	r15, mvd8, mvd0
	bvs	.L529
	ldr	r0, .L956+180
	bl	puts
	b	.L525
.L558:
	ldr	r0, .L956+184
	bl	puts
	b	.L559
.L551:
	ldr	r3, .L956+168
	ldr	r2, .L956+616
	cfldrd	mvd8, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd10, [r2, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd8, mvd10
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	ldr	ip, .L956+48
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldr	r4, .L956+56
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd8, [r4, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd0, mvd10
	cfmuld	mvd0, mvd0, mvd8
	cfmuld	mvd9, mvd9, mvd8
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dadd
	ldr	r3, .L956+32
	stmia	r3, {r0-r1}	@ double
	b	.L556
.L859:
	ldr	r0, .L956+188
	bl	printf
	ldr	ip, .L956+24
	ldr	r4, .L956+636
	ldr	r3, [ip, #12]
	ldr	r6, .L956+56
	add	r3, r3, #1
	ldr	r0, .L956+4
	ldr	r1, .L956+420
	ldr	r2, .L956+192
	str	r3, [ip, #12]
	bl	printf
	cfldrd	mvd1, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L549
.L915:
	ldr	ip, .L956+24
	ldr	r2, .L956
	ldr	r3, [ip, #4]
	ldr	r1, .L956+496
	add	r3, r3, #1
	str	r3, [ip, #4]
	ldr	r0, .L956+4
	bl	printf
	ldmia	r6, {r2-r3}	@ double
	ldmia	r4, {r4-r5}	@ double
	ldr	r0, .L956+196
	stmia	sp, {r4-r5}	@ double
	bl	printf
	b	.L549
.L544:
	ldr	ip, .L956+32
	ldr	r1, .L956+56
	ldr	r2, .L956+92
	ldr	r0, .L956+168
.L802:
	cfldrd	mvd0, [r2, #0]
	ldmia	r1, {r3-r4}	@ double
	cfldrd	mvd1, [r0, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd0, mvd1
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	cfstrd	mvd1, [r2, #0]
	stmia	ip, {r3-r4}	@ double
	cfstrd	mvd0, [r1, #0]
	blt	.L802
	ldr	r3, .L956+376
	mov	r2, #1
	str	r2, [r3, #0]
	b	.L545
.L850:
	ldr	r3, .L956+412
	ldr	r2, .L956+492
	cfldrd	mvd0, [r3, #0]
	ldr	r1, .L956+16
	cfmuld	mvd0, mvd1, mvd0
	cfstrd	mvd0, [r1, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd1, [r2, #0]
	ldr	sl, .L956+344
	ldr	r9, .L956+168
	ldr	fp, .L956+384
	ldr	r7, .L956+200
	stmia	r8, {r5-r6}	@ double
	mov	r5, r2
	mov	r6, r1
.L481:
	cfldrd	mvd8, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd9, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd10, [r6, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfstrd	mvd9, [sl, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd10, [r5, #0]
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	beq	.+12
	bvs	.+8
	b	.L476
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd10, mvd0
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfstrd	mvd8, [fp, #0]
	bl	__aeabi_dsub
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r4, #0]
	ldr	ip, .L956+484
	bic	r2, r1, #-2147483648
	cfcmpd	r15, mvd1, mvd0
	stmia	r7, {r0, r2}	@ phole stm
	cfstrd	mvd9, [ip, #0]
	bne	.L476
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd9, mvd8
	bne	.L930
.L476:
	ldr	r3, .L956+412
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd1, mvd0
	cfldrd	mvd0, [r5, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfstrd	mvd8, [r6, #0]
	bge	.L474
	mov	r0, r0	@ nop
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	blt	.L481
	ldr	r5, .L956+16
	ldr	r4, .L956+416
	cfldrd	mvd1, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L482
.L906:
	mov	r0, #10
	bl	putchar
	cfldrd	mvd0, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r4, #0]
	ldr	r3, .L956+636
	cfcmpd	r15, mvd0, mvd1
	mov	r0, r0	@ nop
	cfstrd	mvd0, [r3, #0]
	bgt	.L851
	ldr	ip, .L956+24
	ldr	r1, .L956+532
	ldr	r3, [ip, #0]
	ldr	r2, .L956+204
	add	r3, r3, #1
	str	r3, [ip, #0]
	ldr	r0, .L956+4
	bl	printf
	ldr	r0, .L956+208
	bl	puts
	ldmia	r5, {r2-r3}	@ double
	ldr	r0, .L956+212
	bl	printf
	ldr	r3, [r5, #4]
	cfldrd	mvd0, [r4, #0]
	ldr	r4, [r5, #0]
	add	r5, r3, #-2147483648
	cfmvdlr	mvd1, r4
	cfmvdhr	mvd1, r5
	ldr	r6, .L956+52
	cfcmpd	r15, mvd1, mvd0
	stmia	r6, {r4-r5}	@ double
	ble	.L931
	bl	TstPtUf
	b	.L482
.L849:
	ldr	r3, .L956+168
	cfstrd	mvd1, [r3, #0]
	b	.L468
.L902:
	ldr	r0, .L956+216
	bl	puts
	ldr	r3, .L956+576
	ldr	fp, .L956+52
	ldmia	r3, {r4-r5}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	floor
	ldmia	r9, {r2-r3}	@ double
	mov	r6, r0
	mov	r7, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	ldmia	sl, {r4-r5}	@ double
	mov	r2, r6
	mov	r3, r7
	bl	__aeabi_dsub
	ldr	r6, .L956+348
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	pow
	ldmia	r6, {r2-r3}	@ double
	bl	__aeabi_dadd
	bl	floor
	ldmia	sl, {r2-r3}	@ double
	ldr	ip, .L956+220
	cfmvdlr	mvd10, r0
	cfmvdhr	mvd10, r1
	stmia	ip, {r0-r1}	@ double
	bl	__aeabi_ddiv
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	r1, .L956+224
	cfstrd	mvd8, [fp, #0]
	ldmia	r1, {r2-r3}	@ double
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	bl	__aeabi_ddiv
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldr	r4, .L956+56
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfstrd	mvd9, [r4, #0]
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	beq	.L932
.L865:
	ldr	r3, .L956+228
	mov	r2, #1
	str	r2, [r3, #0]
	ldr	r3, .L956+376
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L433
.L432:
	ldr	r3, .L956+228
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bne	.L433
.L434:
	ldr	r3, .L956+232
	ldr	r2, .L956+416
	cfldrd	mvd10, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd1
	bge	.L933
.L436:
	ldr	r3, .L956+616
	ldr	r2, .L956+348
	ldr	r1, .L956+360
	ldmia	r3, {r4-r5}	@ double
	cfldrd	mvd9, [r2, #0]
	ldmia	r1, {r2-r3}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	mov	r0, r0	@ nop
	bvs	.L437
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd9
	bvc	.L934
.L437:
	ldr	r3, .L956+552
	mov	r2, #1
	str	r2, [r3, #0]
.L440:
	ldr	r6, .L956+232
	ldr	r4, .L956+348
	ldr	r0, .L956+236
	bl	puts
	ldmia	r4, {r2-r3}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldr	r5, .L956+360
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L956+240
	bl	printf
	ldmia	r5, {r2-r3}	@ double
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L956+244
	bl	printf
	ldmia	r6, {r2-r3}	@ double
	ldmia	r5, {r0-r1}	@ double
	ldr	ip, .L956+44
	cfldrd	mvd8, [ip, #0]
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd8, mvd8, mvd8
	cfcmpd	r15, mvd0, mvd8
	movge	r1, #0
	movlt	r1, #1
	mov	r0, #1
	ldr	r2, .L956+248
	bl	TstCond
	b	.L441
.L836:
	ldr	r0, .L956+252
	bl	puts
	b	.L352
.L828:
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L956+256
	bl	printf
	b	.L197
.L827:
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	ldr	r0, .L956+260
	bl	printf
	b	.L194
.L382:
	ldr	r0, .L956+264
	bl	puts
	b	.L384
.L930:
	cfstrd	mvd9, [r8, #0]
	b	.L476
.L832:
	ldr	r3, .L956+60
	cfldrd	mvd3, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd2, mvd3
	beq	.L935
	mov	r0, r0	@ nop
.L231:
	cfcmpd	r15, mvd2, mvd3
	beq	.L233
	bvs	.L233
	ldr	r3, .L956+268
	ldr	r2, .L956+616
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L233
	bvs	.L233
	mov	r0, r0	@ nop
	ldr	r3, .L956+416
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd2, mvd0
	mov	r0, r0	@ nop
	ble	.L236
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	ble	.L236
.L237:
	ldr	r3, .L956+272
	ldr	r2, .L956+268
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L239
	mov	r0, r0	@ nop
	ldr	r3, .L956+416
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bvc	.L240
.L239:
	ldr	ip, .L956+60
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	r3, .L956+268
	ldr	ip, .L956+616
	ldr	r4, .L956+52
	ldmia	r3, {r0-r1}	@ double
	cfstrd	mvd8, [r4, #0]
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	r3, .L956+56
	cfcmpd	r15, mvd0, mvd8
	stmia	r3, {r0-r1}	@ double
	stmvsia	r4, {r0-r1}	@ double
.L242:
	ldr	r3, .L956+52
	ldr	r6, .L956+484
	ldmia	r3, {r0-r1}	@ double
	bl	log
	add	r1, r1, #-2147483648
	stmia	r6, {r0, r1}	@ phole stm
	ldr	r0, .L956+276
	bl	puts
	ldmia	r6, {r4-r5}	@ double
	ldr	r3, .L956+44
	ldmia	r3, {r0-r1}	@ double
	bl	log
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L956+280
	bl	printf
	ldmia	r6, {r0-r1}	@ double
	ldr	r2, .L956+284
	ldr	r3, .L956+288
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L956+292
	bl	printf
	b	.L240
.L885:
	cfldrd	mvd0, [sp, #72]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd15, mvd0
	mov	r0, r0	@ nop
	bne	.L284
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd15, mvd10
	beq	.+12
	bvs	.+8
	b	.L284
	ldmia	r4, {r4-r5}	@ double
	ldmia	r6, {r0-r1}	@ double
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	ldmia	r6, {r2-r3}	@ double
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r4
	mov	r3, r5
	cfmvdlr	mvd10, r0
	cfmvdhr	mvd10, r1
	bl	__aeabi_dadd
	cfmuld	mvd8, mvd14, mvd13
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	cfmvdlr	mvd14, r0
	cfmvdhr	mvd14, r1
	ldr	ip, .L956+488
	ldr	r6, .L956+52
	cfmuld	mvd0, mvd11, mvd12
	cfmuld	mvd8, mvd10, mvd13
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfstrd	mvd8, [ip, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	cfstrd	mvd14, [r6, #0]
	bl	__aeabi_dsub
	cfmvdlr	mvd11, r0
	cfmvdhr	mvd11, r1
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	mov	r0, r4
	cfmuld	mvd9, mvd9, mvd12
	mov	r1, r5
	cfstrd	mvd11, [r7, #0]
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dadd
	ldr	fp, .L956+56
	str	r0, [sp, #64]
	str	r1, [sp, #68]
	add	r9, sp, #64
	ldmia	r9, {r9-sl}
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	mov	r0, r4
	mov	r1, r5
	stmia	fp, {r9-sl}	@ double
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dsub
	cfmvdlr	mvd10, r0
	cfmvdhr	mvd10, r1
	ldr	ip, .L956+636
	mov	r2, r4
	cfstrd	mvd10, [ip, #0]
	mov	r3, r5
	cfmvrdl	r0, mvd13
	cfmvrdh	r1, mvd13
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd0, mvd12
	cfmvrdl	r2, mvd13
	cfmvrdh	r3, mvd13
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	bl	__aeabi_dsub
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldr	lr, .L956+348
	ldr	ip, .L956+296
	cfmuld	mvd8, mvd13, mvd12
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	ldmia	lr, {r2-r3}	@ double
	cfstrd	mvd9, [ip, #0]
	bl	__aeabi_dsub
	cfcmpd	r15, mvd14, mvd15
	mov	r0, r0	@ nop
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	stmia	r8, {r0-r1}	@ double
	bne	.L289
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [sp, #64]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd15, mvd0
	mov	r0, r0	@ nop
	bne	.L289
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd15, mvd10
	mov	r0, r0	@ nop
	bne	.L289
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd15, mvd11
	mov	r0, r0	@ nop
	bne	.L289
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd15, mvd9
	bne	.L289
	mov	r0, r0	@ nop
	ldr	r3, .L956+348
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd0
	bne	.L289
	ldr	r3, .L956+588
	mov	r2, #1
	str	r2, [r3, #0]
	ldr	r0, .L956+300
	bl	puts
	b	.L296
.L957:
	.align	2
.L956:
	.word	.LC66
	.word	.LC3
	.word	Break
	.word	AInvrse
	.word	PseudoZero
	.word	E0
	.word	ErrCnt
	.word	.LC5
	.word	V
	.word	Milestone
	.word	UfThold
	.word	Radix
	.word	One
	.word	X
	.word	Y
	.word	U1
	.word	.LC218
	.word	.LC219
	.word	.LC220
	.word	Indx
	.word	F9
	.word	sigfpe
	.word	sigsave
	.word	V9
	.word	.LC222
	.word	.LC223
	.word	MyZero
	.word	.LC224
	.word	.LC225
	.word	.LC227
	.word	.LC233
	.word	.LC234
	.word	.LC235
	.word	.LC236
	.word	.LC237
	.word	.LC238
	.word	.LC239
	.word	.LC240
	.word	fpecount
	.word	.LC250
	.word	.LC251
	.word	.LC221
	.word	HInvrse
	.word	.LC183
	.word	E9
	.word	.LC186
	.word	.LC207
	.word	.LC202
	.word	.LC203
	.word	.LC204
	.word	E1
	.word	.LC140
	.word	.LC141
	.word	.LC142
	.word	.LC124
	.word	D
	.word	A1
	.word	Anomaly
	.word	MinSqEr
	.word	.LC130
	.word	.LC131
	.word	.LC132
	.word	.LC133
	.word	.LC112
	.word	.LC48
	.word	.LC46
	.word	.LC122
	.word	Z2
	.word	Z1
	.word	.LC74
	.word	.LC75
	.word	-1145744106
	.word	1073900465
	.word	.LC76
	.word	StickyBit
	.word	.LC94
	.word	GMult
	.word	Three
	.word	Random1
	.word	Random2
	.word	BInvrse
	.word	Eight
	.word	ThirtyTwo
	.word	Two
	.word	OneAndHalf
	.word	F9
	.word	Y1
	.word	Half
	.word	.LC98
	.word	.LC99
	.word	MaxSqEr
	.word	RSqrt
	.word	.LC128
	.word	.LC5
	.word	I
	.word	.LC156
	.word	Y2
	.word	.LC157
	.word	.LC158
	.word	.LC159
	.word	UfNGrad
	.word	ovfl_buf
	.word	R
	.word	H
	.word	Zero
	.word	.LC108
	.word	.LC66
	.word	.LC163
	.word	Z9
	.word	.LC164
	.word	.LC165
	.word	.LC166
	.word	.LC167
	.word	.LC168
	.word	.LC169
	.word	.LC170
	.word	sigfpe
	.word	ovfl_buf
	.word	.LC172
	.word	sigsave
	.word	CInvrse
	.word	Q
	.word	S
	.word	Underflow
	.word	.LC58
	.word	.LC184
	.word	UfThold
	.word	.LC185
	.word	Radix
	.word	N
	.word	.LC194
	.word	.LC196
	.word	ErrCnt
	.word	.LC65
	.word	.LC125
	.word	.LC3
	.word	.LC126
	.word	.LC127
	.word	SqRWrng
	.word	W
	.word	.LC77
	.word	.LC78
	.word	Four
	.word	TwoForty
	.word	Precision
	.word	GDiv
	.word	GAddSub
	.word	RMult
	.word	RDiv
	.word	RAddSub
	.word	RadixD2
	.word	.LC110
	.word	Half
	.word	U1
	.word	U2
	.word	X
	.word	One
	.word	Y
	.word	T
	.word	Z
.L881:
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd9, mvd0
	mov	r0, r0	@ nop
	bne	.L266
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	ldreq	r3, .L956+584
	moveq	r2, #1
	streq	r2, [r3, #0]
	beq	.L271
	b	.L266
.L880:
	ldr	r3, .L956+636
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	ldreq	r3, .L956+580
	moveq	r2, #1
	streq	r2, [r3, #0]
	beq	.L263
	b	.L259
.L878:
	cfcmpd	r15, mvd1, mvd14
	mov	r0, r0	@ nop
	bne	.L247
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	ldreq	r3, .L956+304
	moveq	r2, #1
	streq	r2, [r3, #0]
	beq	.L252
	b	.L247
.L917:
	ldr	r2, .L956+504
	cfmvdlr	mvd1, r6
	cfmvdhr	mvd1, r7
	ldmia	r2, {r1-r2}	@ double
	mov	r3, r1
	add	r4, r2, #-2147483648
	cfmvdlr	mvd2, r3
	cfmvdhr	mvd2, r4
	cfcmpd	r15, mvd1, mvd2
	mov	r0, r0	@ nop
	bvc	.L560
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r6
	cfmvdhr	mvd0, r7
	cfmvdlr	mvd1, r1
	cfmvdhr	mvd1, r2
	cfcmpd	r15, mvd0, mvd1
	bvs	.L564
	b	.L560
.L895:
	add	r5, r3, #-2147483648
	mov	r0, r2
	mov	r1, r5
	mov	r4, r2
	bl	sqrt
	cfmvdlr	mvd2, r4
	cfmvdhr	mvd2, r5
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd2, mvd0
	bne	.L360
	ldr	r4, .L956+624
	ldmia	r4, {r0-r1}	@ double
	bl	sqrt
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd0
	moveq	r1, #1
	beq	.L364
	b	.L360
.L893:
	ldr	ip, .L956+308
	ldr	r3, .L956+348
	ldr	r6, .L956+624
	ldmia	r3, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	ldmia	r6, {r2-r3}	@ double
	mov	r9, r0
	mov	sl, r1
	bl	__aeabi_dadd
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	ip, .L956+616
	ldr	r1, .L956+612
	ldr	r4, .L956+312
	ldmia	r1, {r2-r3}	@ double
	cfstrd	mvd8, [r4, #0]
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_dadd
	ldmia	r6, {r2-r3}	@ double
	mov	r7, r0
	mov	r8, r1
	bl	__aeabi_dadd
	ldmia	r6, {r4-r5}	@ double
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	ip, .L956+316
	ldr	r6, .L956+636
	cfmuld	mvd8, mvd0, mvd8
	cfstrd	mvd0, [ip, #0]
	mov	r2, r4
	mov	r3, r5
	cfstrd	mvd8, [fp, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd8, [r6, #0]
	mov	r0, r9
	mov	r1, sl
	bl	__aeabi_dadd
	mov	r2, r7
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	mov	r3, r8
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd8, mvd8, mvd0
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dsub
	ldr	r7, .L956+432
	stmia	r7, {r0-r1}	@ double
	b	.L355
.L379:
	ldr	r3, .L956+320
	cfldrd	mvd8, [sl, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd8, mvd0
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfstrd	mvd8, [sl, #0]
	ldr	r4, .L956+612
	ldmia	r4, {r2-r3}	@ double
.L864:
	bl	__aeabi_dsub
	ldmia	r4, {r2-r3}	@ double
	stmia	r8, {r0-r1}	@ double
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	stmia	r6, {r0-r1}	@ double
	b	.L838
.L892:
	ldr	r3, .L956+584
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L353
	ldr	r3, .L956+588
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L353
	ldr	r3, .L956+592
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L353
	ldr	r3, .L956+596
	ldr	r2, [r3, #0]
	subs	r1, r2, #0
	movne	r1, #1
	b	.L354
.L875:
	ldr	r3, .L956+624
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	movne	r1, #0
	moveq	r1, #1
	b	.L200
.L873:
	ldr	ip, .L956+416
	cfmvrdl	r2, mvd11
	cfmvrdh	r3, mvd11
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	cfldrd	mvd12, [ip, #0]
	bl	__aeabi_ddiv
	cfmuld	mvd0, mvd8, mvd8
	cfmuld	mvd0, mvd9, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd12
	mov	r0, r0	@ nop
	bne	.L170
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	bl	__aeabi_ddiv
	cfmuld	mvd0, mvd9, mvd11
	cfmuld	mvd0, mvd8, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd12, mvd0
	mov	r0, r0	@ nop
	bne	.L170
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	bl	__aeabi_ddiv
	cfmuld	mvd0, mvd8, mvd11
	cfmuld	mvd0, mvd8, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd12, mvd0
	movne	r1, #0
	moveq	r1, #1
	b	.L175
.L872:
	ldr	r3, .L956+568
	ldr	ip, .L956+324
	cfldrd	mvd8, [r3, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfldrd	mvd9, [ip, #0]
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd9
	bne	.L164
	mov	r0, r0	@ nop
	ldr	r3, .L956+328
	cfmuld	mvd0, mvd8, mvd9
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	mov	r0, r0	@ nop
	bne	.L164
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	ldr	ip, .L956+624
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dsub
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd0
	movne	r1, #0
	moveq	r1, #1
	b	.L169
.L871:
	bic	r2, r5, #-2147483648
	mov	r1, r2
	mov	r3, r1
	mov	r2, r4
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd9, mvd0
	mov	r0, r0	@ nop
	bne	.L159
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd8, mvd8
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd9, mvd0
	movne	r1, #0
	moveq	r1, #1
	b	.L163
.L870:
	mov	r3, r5
	add	r4, r6, #-2147483648
	cfmvdlr	mvd1, r3
	cfmvdhr	mvd1, r4
	cfmvdlr	mvd2, r5
	cfmvdhr	mvd2, r6
	ldr	ip, .L956+416
	cfmuld	mvd0, mvd2, mvd1
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	cfldrd	mvd10, [ip, #0]
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd10
	mov	r0, r0	@ nop
	bne	.L154
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dsub
	mov	r2, r7
	mov	r3, r8
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd10, mvd0
	movne	r1, #0
	moveq	r1, #1
	b	.L158
.L868:
	cfcmpd	r15, mvd8, mvd9
	mov	r0, r0	@ nop
	bge	.L147
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	ldr	r9, .L956+332
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	movne	r1, #0
	moveq	r1, #1
	b	.L151
.L886:
	cfcmpd	r15, mvd10, mvd9
	mov	r0, r0	@ nop
	blt	.L305
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd10
	bvs	.L305
	ldr	r4, .L956+336
	add	r2, sp, #56
	ldmia	r2, {r2-r3}
	ldmia	r4, {r0-r1}	@ double
	str	ip, [sp, #20]
	bl	__aeabi_ddiv
	ldr	r6, .L956+336
	mov	r4, r0
	mov	r5, r1
	mov	r2, sl
	mov	r3, fp
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dsub
	mov	r6, r0
	mov	r7, r1
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	add	r2, sp, #48
	ldmia	r2, {r2-r3}
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldr	lr, .L956+336
	ldr	r4, .L956+620
	ldmia	lr, {r0-r1}	@ double
	cfstrd	mvd9, [r4, #0]
	bl	__aeabi_ddiv
	add	r2, sp, #48
	ldmia	r2, {r2-r3}
	mov	r4, r0
	mov	r5, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_ddiv
	mov	r2, sl
	mov	r6, r0
	mov	r7, r1
	mov	r0, r8
	mov	r1, r9
	mov	r3, fp
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd12, r0
	cfmvdhr	mvd12, r1
	ldr	ip, [sp, #20]
	mov	r2, r8
	cfstrd	mvd12, [ip, #0]
	mov	r3, r9
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	add	r2, sp, #56
	ldmia	r2, {r2-r3}
	cfmvdlr	mvd13, r0
	cfmvdhr	mvd13, r1
	ldr	r5, .L956+628
	mov	r0, r8
	mov	r1, r9
	cfstrd	mvd13, [r5, #0]
	bl	__aeabi_ddiv
	mov	r2, sl
	mov	r6, r0
	mov	r7, r1
	mov	r3, fp
	add	r0, sp, #56
	ldmia	r0, {r0-r1}
	bl	__aeabi_dadd
	add	r2, sp, #56
	ldmia	r2, {r2-r3}
	bl	__aeabi_ddiv
	mov	r4, r0
	mov	r0, r6
	ldr	r6, .L956+336
	mov	r5, r1
	ldmia	r6, {r2-r3}	@ double
	mov	r1, r7
	bl	__aeabi_dsub
	add	r2, sp, #56
	ldmia	r2, {r2-r3}
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	r7, .L956+636
	mov	r0, r4
	cfstrd	mvd8, [r7, #0]
	mov	r1, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd11, r0
	cfmvdhr	mvd11, r1
	ldr	r3, .L956+340
	ldr	r1, .L956+612
	ldr	r8, .L956+384
	ldmia	r3, {r6-r7}	@ double
	cfstrd	mvd11, [r8, #0]
	ldmia	r1, {r2-r3}	@ double
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r6
	mov	r3, r7
	bl	__aeabi_ddiv
	ldr	sl, .L956+344
	mov	r8, r0
	mov	r9, r1
	cfcmpd	r15, mvd9, mvd10
	stmia	sl, {r8-r9}	@ double
	bne	.L306
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd13
	mov	r0, r0	@ nop
	bne	.L306
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd8
	mov	r0, r0	@ nop
	bne	.L306
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd12
	mov	r0, r0	@ nop
	bne	.L306
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd11
	bne	.L306
	ldr	r3, .L956+348
	ldmia	r3, {r4-r5}	@ double
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	mov	r2, r4
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	mov	r3, r5
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bne	.L306
	ldr	r3, .L956+592
	mov	r2, #1
	str	r2, [r3, #0]
	ldr	r0, .L956+352
	bl	puts
	ldr	r3, .L956+580
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bne	.L305
	ldr	r0, .L956+356
	bl	notify
	b	.L305
.L879:
	cfcmpd	r15, mvd1, mvd0
	movne	r1, #0
	moveq	r1, #1
	b	.L258
.L916:
	cfstrd	mvd8, [r4, #0]
	b	.L556
.L933:
	ldr	r3, .L956+360
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	blt	.L436
	ldr	r3, .L956+364
	mov	r2, #1
	str	r2, [r3, #0]
	ldr	r0, .L956+368
	bl	puts
	b	.L435
.L911:
	ldr	ip, .L956+528
	ldr	r2, .L956+424
	ldr	r3, [ip, #8]
	ldr	r0, .L956+540
	add	r3, r3, #1
	str	r3, [ip, #8]
	ldr	r1, .L956+372
	bl	printf
	ldr	r3, .L956+376
	mov	r2, #5
	str	r2, [r3, #0]
	b	.L523
.L501:
	ldr	ip, .L956+528
	ldr	r1, .L956+532
	ldr	r3, [ip, #0]
	ldr	r2, .L956+380
	add	r3, r3, #1
	str	r3, [ip, #0]
	ldr	r6, .L956+484
	ldr	r0, .L956+540
	bl	printf
	ldr	r7, .L956+384
	ldr	r0, .L956+388
	bl	puts
	ldmia	r6, {r2-r3}	@ double
	ldmia	r7, {r4-r5}	@ double
	ldr	r0, .L956+392
	stmia	sp, {r4-r5}	@ double
	bl	printf
	ldmia	r7, {r2-r3}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dsub
	bic	r5, r1, #-2147483648
	mov	r2, r0
	mov	r3, r5
	ldr	r0, .L956+396
	bl	printf
	ldmia	r6, {r3-r4}	@ double
	ldr	r2, .L956+504
	stmia	r2, {r3-r4}	@ double
	ldr	r3, .L956+400
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L511
.L507:
	mov	r0, #10
	bl	putchar
	ldr	r2, .L956+464
	ldr	r3, .L956+476
	ldr	r0, .L956+404
	str	r2, [r3, #0]
	bl	_setjmp
	cmp	r0, #0
	bne	.L936
	ldr	ip, .L956+504
	ldr	r3, .L956+492
	ldmia	r3, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	bl	sqrt
	ldr	r3, .L956+408
	stmia	r3, {r0-r1}	@ double
.L513:
	ldr	r3, .L956+408
	ldr	r2, .L956+412
	cfldrd	mvd8, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L956+476
	mov	r2, #0
	cfcmpd	r15, mvd8, mvd0
	str	r2, [r3, #0]
	bgt	.L853
	mov	r0, r0	@ nop
	ldr	r2, .L956+504
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfldrd	mvd9, [r2, #0]
	ldr	ip, .L956+636
	cfmuld	mvd9, mvd8, mvd9
	ldr	r3, .L956+624
	cfstrd	mvd9, [ip, #0]
	ldmia	r3, {r4-r5}	@ double
	cfmuld	mvd8, mvd0, mvd8
	mov	r2, r4
	mov	r3, r5
.L866:
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd8, mvd8, mvd0
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	r3, .L956+620
	cfmuld	mvd9, mvd9, mvd0
	cfstrd	mvd9, [r3, #0]
	ldr	r7, .L956+620
	ldr	r6, .L956+636
	cfldrd	mvd1, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	beq	.L511
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	bl	__aeabi_dsub
	ldr	r3, .L956+416
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L511
	ldr	ip, .L956+528
	ldr	r1, .L956+420
	ldr	r3, [ip, #12]
	ldr	r2, .L956+424
	add	r3, r3, #1
	str	r3, [ip, #12]
	ldr	r0, .L956+540
	bl	printf
	ldmia	r7, {r2-r3}	@ double
	ldmia	r6, {r4-r5}	@ double
	ldr	r0, .L956+428
	stmia	sp, {r4-r5}	@ double
	bl	printf
	ldmia	r6, {r2-r3}	@ double
	ldmia	r7, {r0-r1}	@ double
	bl	__aeabi_dsub
	mov	r3, r1
	mov	r5, r1
	ldr	r1, .L956+432
	mov	r4, r0
	mov	r2, r0
	stmia	r1, {r4-r5}	@ double
	ldr	r0, .L956+436
	bl	printf
	ldr	r0, .L956+440
	bl	printf
	ldr	r0, .L956+444
	bl	printf
	ldr	r0, .L956+448
	bl	puts
	ldr	r0, .L956+452
	bl	printf
	ldr	r0, .L956+456
	bl	puts
	ldr	r0, .L956+460
	bl	puts
	ldr	r2, .L956+464
	ldr	r3, .L956+476
	ldr	r0, .L956+468
	str	r2, [r3, #0]
	bl	_setjmp
	cmp	r0, #0
	bne	.L937
	ldr	ip, .L956+636
	ldr	r3, .L956+608
	ldr	r2, .L956+620
	ldmia	r3, {r4-r5}	@ double
	ldmia	r2, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L956+472
	bl	printf
.L518:
	ldr	r3, .L956+476
	mov	r2, #0
	str	r2, [r3, #0]
	b	.L511
.L500:
	ldr	r3, .L956+480
	ldr	r2, .L956+628
	cfldrd	mvd2, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd4, [r2, #0]
	ldr	r3, .L956+484
	ldr	r2, .L956+488
	cfldrd	mvd3, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd1, mvd2, mvd4
	cfmuld	mvd1, mvd1, mvd0
	cfmuld	mvd2, mvd2, mvd3
	ldr	r5, .L956+504
	ldr	r2, .L956+492
	cfcmpd	r15, mvd2, mvd1
	ldmia	r2, {r3-r4}	@ double
	stmia	r5, {r3-r4}	@ double
	bne	.L938
	bl	Pause
	b	.L499
.L526:
	ldr	r3, .L956+528
	ldr	r1, .L956+496
	ldr	ip, [r3, #4]
	ldr	r2, .L956+500
	add	ip, ip, #1
	str	ip, [r3, #4]
	ldr	r0, .L956+540
	bl	printf
	ldr	r1, .L956+504
	ldr	r0, .L956+508
	ldmia	r1, {r2-r3}	@ double
	bl	printf
	b	.L525
.L910:
	ldr	r3, .L956+512
	cfmuld	mvd1, mvd8, mvd8
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L863
	ldr	r4, .L956+616
	stmia	sl, {r0-r1}	@ double
	ldmia	r4, {r2-r3}	@ double
	b	.L864
.L913:
	ldr	r3, .L956+516
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bne	.L533
	ldr	r0, .L956+520
	bl	puts
	b	.L533
.L914:
	ldr	r0, .L956+524
	bl	puts
	b	.L543
.L433:
	ldr	ip, .L956+528
	ldr	r1, .L956+532
	ldr	r3, [ip, #0]
	ldr	r2, .L956+536
	add	r3, r3, #1
	str	r3, [ip, #0]
	ldr	r0, .L956+540
	bl	printf
	ldr	r1, .L956+556
	ldr	r0, .L956+544
	ldmia	r1, {r2-r3}	@ double
	bl	printf
	ldr	r0, .L956+548
	bl	puts
	ldr	r3, .L956+552
	mov	r2, #1
	str	r2, [r3, #0]
	b	.L402
.L877:
	ldr	r3, .L956+556
	cfmuld	mvd0, mvd1, mvd1
	ldmia	r3, {r0-r1}	@ double
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	bl	__aeabi_ddiv
	ldr	ip, .L956+624
	mov	r6, r0
	ldmia	ip, {r2-r3}	@ double
	mov	r7, r1
	bl	__aeabi_dadd
	ldr	ip, .L956+628
	mov	r4, r0
	mov	r5, r1
	stmia	ip, {r4-r5}	@ double
	mov	r2, r6
	mov	r3, r7
	bl	__aeabi_dsub
	ldr	r8, .L956+616
	ldr	ip, .L956+636
	mov	r4, r0
	mov	r5, r1
	ldmia	r8, {r2-r3}	@ double
	stmia	ip, {r4-r5}	@ double
	bl	__aeabi_dadd
	ldr	ip, .L956+632
	mov	r6, r0
	mov	r7, r1
	mov	r2, r4
	mov	r3, r5
	stmia	ip, {r6-r7}	@ double
	bl	__aeabi_dsub
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	ldr	r4, .L956+620
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	movne	r1, #0
	moveq	r1, #1
	cfstrd	mvd1, [r4, #0]
	mov	r0, #0
	ldr	r2, .L956+560
	bl	TstCond
	cfldrd	mvd1, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r8, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bne	.L244
	ldr	r0, .L956+564
	bl	printf
	b	.L244
.L876:
	ldr	r2, .L956+572
	ldr	r3, .L956+612
	ldr	ip, [r2, #4]
	ldmia	r3, {r0-r1}	@ double
	add	r5, ip, #-2147483648
	ldr	r4, [r2, #0]
	bl	log
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r7, {r0-r1}	@ double
	bl	log
	cfmvdlr	mvd2, r4
	cfmvdhr	mvd2, r5
	cfmuld	mvd8, mvd2, mvd8
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_ddiv
	ldr	ip, .L956+608
	mov	r4, r0
	mov	r5, r1
	ldmia	ip, {r2-r3}	@ double
	stmia	sl, {r4-r5}	@ double
	bl	__aeabi_dadd
	bl	floor
	mov	r6, r0
	mov	r7, r1
	mov	r0, r4
	mov	r1, r5
	mov	r3, r7
	mov	r2, r6
	bl	__aeabi_dsub
	ldr	r3, .L956+568
	mov	r4, r0
	bic	r5, r1, #-2147483648
	cfmvdlr	mvd1, r4
	cfmvdhr	mvd1, r5
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd1, mvd0
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	stmltia	sl, {r6-r7}	@ double
.L206:
	ldr	ip, .L956+620
	ldr	r7, .L956+572
	ldmia	ip, {r0-r1}	@ double
	ldmia	r7, {r2-r3}	@ double
	bl	__aeabi_ddiv
	ldr	r6, .L956+608
	ldr	sl, .L956+576
	mov	r4, r0
	mov	r5, r1
	ldmia	r6, {r2-r3}	@ double
	stmia	sl, {r4-r5}	@ double
	bl	__aeabi_dadd
	bl	floor
	ldr	ip, .L956+628
	mov	r8, r0
	mov	r9, r1
	mov	r0, r4
	mov	r1, r5
	mov	r2, r8
	mov	r3, r9
	stmia	ip, {r8-r9}	@ double
	bl	__aeabi_dsub
	mov	r4, r0
	bic	r5, r1, #-2147483648
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd2, r4
	cfmvdhr	mvd2, r5
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd2, mvd0
	cfcmpd	r15, mvd0, mvd1
	stmltia	sl, {r8-r9}	@ double
	b	.L204
.L891:
	ldr	r3, .L956+580
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L335
	ldr	r3, .L956+584
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L335
	ldr	r3, .L956+588
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L335
	ldr	r3, .L956+592
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L335
	ldr	r3, .L956+596
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L335
	mov	r0, r0	@ nop
	ldr	r3, .L956+600
	cfldrd	mvd8, [r3, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bne	.L335
	ldr	r0, .L956+604
	bl	puts
	ldr	r4, .L956+608
	ldr	ip, .L956+612
	ldmia	r4, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldr	r3, .L956+616
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd9, [r3, #0]
	ldr	ip, .L956+620
	ldr	r6, .L956+624
	ldr	fp, .L956+628
	cfmuld	mvd8, mvd0, mvd9
	cfmuld	mvd10, mvd1, mvd9
	ldmia	r6, {r2-r3}	@ double
	cfstrd	mvd10, [ip, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	cfstrd	mvd8, [fp, #0]
	bl	__aeabi_dadd
	ldr	r7, .L956+636
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	ldmia	r6, {r0-r1}	@ double
	stmia	r7, {r4-r5}	@ double
	bl	__aeabi_dadd
	ldmia	r6, {r6-r7}	@ double
	ldr	ip, .L956+632
	mov	r8, r0
	mov	r9, r1
	mov	r0, r4
	mov	r1, r5
	mov	r2, r6
	mov	r3, r7
	stmia	ip, {r8-r9}	@ double
	bl	__aeabi_dsub
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd0
	bgt	.L335
	mov	r2, r6
	mov	r3, r7
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd9
	mov	r0, r0	@ nop
	beq	.+12
	bvs	.+8
	b	.L335
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dadd
	ldr	sl, .L956+636
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	stmia	sl, {r4-r5}	@ double
	bl	__aeabi_dsub
	mov	r6, r0
	mov	r7, r1
	mov	r0, r4
	mov	r1, r5
	mov	r2, r8
	mov	r3, r9
	stmia	fp, {r6-r7}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd9
	beq	.+12
	bvs	.+8
	b	.L335
	mov	r3, r9
	mov	r0, r6
	mov	r1, r7
	mov	r2, r8
	bl	__aeabi_dsub
	ldr	r3, .L958+424
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd12, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd12
	bne	.L335
	ldr	r3, .L958
	ldr	r4, .L958+352
	cfldrd	mvd9, [r3, #0]
	ldmia	r4, {r2-r3}	@ double
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dadd
	cfldrd	mvd13, [r4, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	ip, .L958+404
	ldr	lr, .L958+344
	ldr	fp, .L958+360
	cfmuld	mvd10, mvd13, mvd9
	cfmuld	mvd8, mvd9, mvd8
	ldmia	ip, {r0-r1}	@ double
	cfstrd	mvd10, [lr, #0]
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	cfstrd	mvd8, [fp, #0]
	bl	__aeabi_dsub
	ldr	r6, .L958+404
	ldr	r7, .L958+332
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	ldmia	r6, {r0-r1}	@ double
	stmia	r7, {r4-r5}	@ double
	bl	__aeabi_dsub
	ldr	r8, .L958+404
	ldr	r9, .L958+4
	mov	r6, r0
	mov	r7, r1
	mov	r0, r4
	mov	r1, r5
	ldmia	r8, {r2-r3}	@ double
	stmia	r9, {r6-r7}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd12
	bne	.L335
	ldr	sl, .L958+324
	mov	r0, r6
	mov	r1, r7
	ldmia	sl, {r2-r3}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd12, mvd0
	mov	r0, r0	@ nop
	bne	.L335
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	cfmvrdl	r0, mvd13
	cfmvrdh	r1, mvd13
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldmia	sl, {r0-r1}	@ double
	ldr	ip, .L958+332
	cfmuld	mvd0, mvd9, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfstrd	mvd0, [ip, #0]
	bl	__aeabi_dsub
	ldr	lr, .L958+4
	mov	r4, r0
	mov	r5, r1
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	ldmia	sl, {r0-r1}	@ double
	stmia	lr, {r4-r5}	@ double
	bl	__aeabi_dsub
	ldmia	sl, {r6-r7}	@ double
	ldr	ip, .L958+356
	mov	r8, r0
	mov	r9, r1
	mov	r0, r4
	mov	r1, r5
	mov	r2, r6
	mov	r3, r7
	stmia	ip, {r8-r9}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd12
	mov	r0, r0	@ nop
	bne	.L335
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r8
	mov	r3, r9
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd12, mvd0
	bne	.L335
	ldr	r4, .L958+320
	ldr	r2, .L958+404
	ldr	r5, .L958+4
	ldmia	r2, {r0-r1}	@ double
	ldmia	r4, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldr	r3, .L958+8
	cfldrd	mvd11, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfmuld	mvd8, mvd8, mvd0
	cfmvrdl	r0, mvd11
	cfmvrdh	r1, mvd11
	bl	__aeabi_dadd
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd11
	cfmvrdh	r1, mvd11
	bl	__aeabi_dadd
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	r4, .L958+412
	ldr	r6, .L958+404
	cfmvrdl	r0, mvd13
	cfmvrdh	r1, mvd13
	ldmia	r4, {r2-r3}	@ double
	cfstrd	mvd8, [r5, #0]
	bl	__aeabi_ddiv
	ldmia	r6, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldmia	r6, {r2-r3}	@ double
	cfldrd	mvd13, [r4, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	cfmuld	mvd10, mvd13, mvd11
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	cfstrd	mvd9, [fp, #0]
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	ldr	r7, .L958+332
	ldr	r8, .L958+344
	cfcmpd	r15, mvd8, mvd12
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd0, mvd9
	cfstrd	mvd8, [r7, #0]
	stmia	r8, {r0-r1}	@ double
	bne	.L335
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	bl	__aeabi_dadd
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd12, mvd0
	bne	.L335
	mov	r0, r0	@ nop
	ldr	r3, .L958+416
	cfldrd	mvd8, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd13, mvd8
	mov	r0, r0	@ nop
	beq	.L835
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfmvrdl	r0, mvd11
	cfmvrdh	r1, mvd11
	bl	__aeabi_dadd
	mov	r4, r0
	mov	r5, r1
	stmia	fp, {r4-r5}	@ double
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	bl	__aeabi_ddiv
	ldr	r9, .L958+404
	ldr	sl, .L958+344
	mov	r4, r0
	mov	r5, r1
	ldmia	r9, {r2-r3}	@ double
	stmia	sl, {r4-r5}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd0, mvd12
	bne	.L335
.L835:
	ldr	r3, .L958+12
	ldr	r0, .L958+408
	ldmia	r3, {r1-r2}	@ double
	stmia	r0, {r1-r2}	@ double
	b	.L335
.L887:
	ldr	r0, .L958+16
	bl	puts
	b	.L319
.L883:
	ldr	r3, .L958+20
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L275
	ldr	r3, .L958+24
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L275
	ldr	r0, .L958+28
	bl	puts
	b	.L275
.L904:
	ldr	r0, .L958+32
	bl	puts
	ldr	r3, .L958+36
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bgt	.L939
.L455:
	mov	r0, #10
	bl	putchar
	b	.L456
.L924:
	ldr	ip, .L958+40
	ldr	r3, .L958+404
	ldmia	r3, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L958+44
	bl	printf
	b	.L606
.L896:
	bl	Pause
	b	.L365
.L890:
	ldr	ip, .L958+364
	ldr	r1, .L958+48
	ldr	r3, [ip, #12]
	ldr	r2, .L958+52
	add	r3, r3, #1
	cfstrd	mvd1, [sl, #0]
	str	r3, [ip, #12]
	ldr	r0, .L958+376
	bl	printf
	b	.L333
.L874:
	ldr	r0, .L958+56
	bl	puts
	mov	r0, #10
	bl	putchar
	b	.L176
.L926:
	ldr	r0, .L958+60
	ldr	r1, .L958+64
	bl	printf
	ldr	r3, .L958+364
	ldr	r2, [r3, #4]
	cmp	r2, #0
	beq	.L609
.L927:
	ldr	r0, .L958+60
	ldr	r1, .L958+68
	bl	printf
	ldr	r3, .L958+364
	ldr	r2, [r3, #8]
	cmp	r2, #0
	beq	.L610
.L928:
	ldr	r0, .L958+60
	ldr	r1, .L958+72
	bl	printf
	ldr	r3, .L958+364
	ldr	r2, [r3, #12]
	cmp	r2, #0
	beq	.L611
.L929:
	ldr	r1, .L958+76
	ldr	r0, .L958+60
	bl	printf
	b	.L611
.L925:
	ldr	ip, .L958+40
	ldr	r3, .L958+424
	ldmia	r3, {r0-r1}	@ double
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L958+44
	bl	printf
	b	.L607
.L908:
	ldr	r2, .L958+344
	ldmia	r2, {r3-r4}	@ double
	stmia	ip, {r3-r4}	@ double
	b	.L494
.L869:
	ldr	r2, .L958+364
	ldr	r0, .L958+80
	ldr	r3, [r2, #0]
	ldr	r4, .L958+84
	add	r3, r3, #1
	str	r3, [r2, #0]
	bl	puts
	ldr	r3, .L958+88
	ldr	r2, .L958+320
	ldr	r1, .L958+92
	stmia	r2, {r3-r4}	@ double
	ldr	r3, .L958+412
	mov	r0, #0
	stmia	r3, {r0-r1}	@ double
	bl	TstPtUf
	b	.L152
.L894:
	ldr	ip, .L958+364
	ldr	r1, .L958+372
	ldr	r3, [ip, #8]
	ldr	r2, .L958+96
	add	r3, r3, #1
	str	r3, [ip, #8]
	ldr	r0, .L958+376
	bl	printf
	b	.L359
.L889:
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	ldmia	sl, {r0-r1}	@ double
	bl	__aeabi_dadd
	ldr	ip, .L958
	cfmvrdl	r2, mvd10
	cfmvrdh	r3, mvd10
	cfmvdlr	mvd9, r0
	cfmvdhr	mvd9, r1
	ldmia	sl, {r0-r1}	@ double
	cfldrd	mvd10, [ip, #0]
	bl	__aeabi_dsub
	cfmuld	mvd9, mvd9, mvd10
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r8, {r0-r1}	@ double
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dsub
	cfmuld	mvd8, mvd8, mvd10
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r4, r0
	mov	r5, r1
	ldmia	r8, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldr	ip, .L958+324
	mov	r2, r4
	mov	r3, r5
	mov	r6, r0
	mov	r7, r1
	ldmia	ip, {r0-r1}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	r8, {r0-r1}	@ double
	ldr	r4, .L958+360
	mov	r2, r6
	mov	r3, r7
	cfstrd	mvd8, [r4, #0]
	bl	__aeabi_dsub
	ldr	r5, .L958+344
	cfcmpd	r15, mvd8, mvd11
	mov	r0, r0	@ nop
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	stmia	r5, {r0-r1}	@ double
	bne	.L325
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd11
	bne	.L325
	ldr	r3, .L958+396
	ldr	r0, .L958+100
	str	r9, [r3, #0]
	bl	puts
	ldr	r3, [fp, #0]
	cmp	r3, #0
	bne	.L332
	ldr	r0, .L958+104
	bl	notify
	b	.L332
.L935:
	ldr	r3, .L958+336
	ldr	r2, .L958+320
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.L229
	b	.L231
.L862:
	ldr	ip, .L958+364
	ldr	r1, .L958+48
	ldr	r3, [ip, #12]
	ldr	r2, .L958+108
	add	r3, r3, #1
	str	r3, [ip, #12]
	ldr	r0, .L958+376
	bl	printf
	b	.L592
.L851:
	ldr	ip, .L958+364
	ldr	r1, .L958+48
	ldr	r3, [ip, #12]
	ldr	r2, .L958+112
	add	r3, r3, #1
	str	r3, [ip, #12]
	ldr	r0, .L958+376
	bl	printf
	ldmia	r5, {r2-r3}	@ double
	ldr	r0, .L958+116
	bl	printf
	bl	TstPtUf
	b	.L482
.L936:
	ldr	r0, .L958+120
	bl	puts
	ldr	r3, .L958+124
	ldmia	r3, {r0-r1}	@ double
	mov	r3, r1
	mov	r2, r0
	bl	__aeabi_dadd
	ldr	r3, .L958+128
	stmia	r3, {r0-r1}	@ double
	b	.L513
.L907:
	ldr	ip, .L958+364
	ldr	r0, .L958+376
	ldr	r3, [ip, #8]
	ldr	r1, .L958+372
	add	r3, r3, #1
	ldr	r2, .L958+108
	str	r3, [ip, #8]
	bl	printf
	cfldrd	mvd1, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r5, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bge	.L852
	ldr	r0, .L958+132
	bl	printf
	ldr	r0, .L958+136
	bl	puts
	ldr	r3, .L958+140
	cfldrd	mvd1, [r6, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	ldmeqia	r4, {r3-r4}	@ double
	stmeqia	r5, {r3-r4}	@ double
	b	.L490
.L882:
	ldr	ip, .L958+364
	ldr	r1, .L958+144
	ldr	r3, [ip, #4]
	ldr	r2, .L958+148
	add	r3, r3, #1
	str	r3, [ip, #4]
	ldr	r0, .L958+376
	bl	printf
	ldr	r0, .L958+152
	bl	puts
	ldr	r0, .L958+156
	bl	puts
	ldr	r0, .L958+160
	bl	puts
	b	.L272
.L888:
	ldr	r3, .L958+396
	mov	r2, #2
	str	r2, [r3, #0]
	ldr	r0, .L958+164
	bl	puts
	b	.L322
.L905:
	ldr	ip, .L958+364
	ldr	r1, .L958+168
	ldr	r3, [ip, #0]
	ldr	r2, .L958+172
	add	r3, r3, #1
	str	r3, [ip, #0]
	ldr	r0, .L958+376
	bl	printf
	ldmia	r4, {r3-r4}	@ double
	ldr	r2, .L958+288
	ldr	r1, .L958+176
	stmia	r2, {r3-r4}	@ double
	ldmia	r1, {r4-r5}	@ double
	ldr	r3, .L958+332
	ldr	r2, .L958+180
	ldmia	r3, {r0-r1}	@ double
	ldr	r3, .L958+140
	stmia	r2, {r4-r5}	@ double
	stmia	r3, {r0-r1}	@ double
	bl	Pause
	b	.L474
.L934:
	ldr	ip, .L958+412
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd9, mvd0
	bvs	.L437
	ldr	r3, .L958+400
	mov	r2, #2
	str	r2, [r3, #0]
	ldr	r0, .L958+184
	bl	puts
	b	.L435
.L233:
	ldr	ip, .L958+364
	ldr	r1, .L958+168
	ldr	r3, [ip, #0]
	ldr	r2, .L958+108
	add	r3, r3, #1
	str	r3, [ip, #0]
	ldr	r0, .L958+376
	bl	printf
	ldr	r0, .L958+188
	bl	notify
	ldr	r3, .L958
	ldr	r2, .L958+312
	ldmia	r3, {r4-r5}	@ double
	ldmia	r2, {r0-r1}	@ double
	mov	r3, r5
	mov	r2, r4
	bl	__aeabi_dsub
	mov	r2, r4
	stmia	sp, {r0-r1}	@ double
	mov	r3, r5
	ldr	r0, .L958+192
	bl	printf
	ldr	r3, .L958+320
	ldr	r2, .L958+336
	ldmia	r3, {r4-r5}	@ double
	ldmia	r2, {r0-r1}	@ double
	mov	r3, r5
	mov	r2, r4
	bl	__aeabi_dsub
	mov	r2, r4
	stmia	sp, {r0-r1}	@ double
	mov	r3, r5
	ldr	r0, .L958+196
	bl	printf
	b	.L229
.L938:
	ldr	r3, .L958+364
	cfstrd	mvd4, [r5, #0]
	ldr	ip, [r3, #0]
	ldr	r1, .L958+168
	add	ip, ip, #1
	str	ip, [r3, #0]
	ldr	r2, .L958+200
	ldr	r0, .L958+376
	bl	printf
	ldmia	r5, {r2-r3}	@ double
	ldr	r0, .L958+204
	bl	printf
	ldr	r1, .L958+208
	ldr	r0, .L958+212
	ldmia	r1, {r2-r3}	@ double
	bl	printf
	ldr	r0, .L958+216
	bl	puts
	bl	Pause
	b	.L499
.L931:
	ldr	r0, .L958+220
	bl	puts
	ldmia	r6, {r2-r3}	@ double
	ldr	r0, .L958+224
	bl	printf
	bl	TstPtUf
	b	.L482
.L306:
	cfcmpd	r15, mvd9, mvd10
	bge	.L305
	mov	r0, r0	@ nop
	ldr	r3, .L958+344
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd0
	bvc	.L305
	mov	r0, r0	@ nop
	ldr	r3, .L958+332
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd0
	bvc	.L305
	mov	r0, r0	@ nop
	ldr	r3, .L958+4
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd0
	bvc	.L305
	mov	r0, r0	@ nop
	ldr	r3, .L958+284
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd10, mvd0
	bvc	.L305
	ldr	r3, .L958+352
	mov	r0, r8
	ldmia	r3, {r4-r5}	@ double
	mov	r1, r9
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	ldr	ip, .L958+324
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	ip, {r0-r1}	@ double
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bge	.L305
	ldr	r3, .L958+228
	mov	r2, #2
	str	r2, [r3, #0]
	ldr	r0, .L958+232
	bl	puts
	b	.L305
.L236:
	ldr	r1, .L958+412
	ldr	r0, .L958+236
	ldmia	r1, {r2-r3}	@ double
	bl	printf
	ldr	r0, .L958+240
	bl	puts
	ldr	r1, .L958+312
	ldr	r0, .L958+244
	ldmia	r1, {r2-r3}	@ double
	ldr	r1, .L958+336
	ldmia	r1, {r4-r5}	@ double
	stmia	sp, {r4-r5}	@ double
	bl	printf
	ldr	r0, .L958+248
	bl	notify
	b	.L237
.L289:
	ldr	r3, .L958+320
	cfmvrdl	r0, mvd14
	cfmvrdh	r1, mvd14
	ldmia	r3, {r4-r5}	@ double
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd15, mvd0
	bne	.L297
	mov	r0, r0	@ nop
	ldr	r3, .L958+344
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd15, mvd0
	bvc	.L297
	ldr	ip, .L958+332
	mov	r0, r4
	mov	r1, r5
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd15, mvd0
	bne	.L297
	mov	r0, r0	@ nop
	ldr	r3, .L958+4
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd15, mvd0
	bvc	.L297
	ldr	ip, .L958+408
	mov	r0, r4
	mov	r1, r5
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd15, mvd0
	bne	.L297
	mov	r0, r0	@ nop
	ldr	r3, .L958+352
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd0
	bge	.L297
	ldr	r3, .L958+252
	mov	r2, #2
	str	r2, [r3, #0]
	ldr	r0, .L958+256
	bl	puts
	b	.L296
.L297:
	ldr	r0, .L958+260
	bl	puts
.L296:
	ldr	r3, .L958+252
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L304
	ldr	r3, .L958+264
	ldr	r2, [r3, #0]
	cmp	r2, #0
	bne	.L304
	ldr	r0, .L958+268
	bl	notify
	b	.L304
.L612:
	ldr	r0, .L958+272
	bl	puts
	ldr	r3, .L958+252
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L617
	ldr	r3, .L958+228
	ldr	r2, [r3, #0]
	cmp	r2, #1
	beq	.L940
.L617:
	ldr	r0, .L958+276
	bl	puts
	b	.L616
.L853:
	ldr	ip, .L958+280
	ldr	r3, .L958+404
	cfldrd	mvd9, [ip, #0]
	ldmia	r3, {r4-r5}	@ double
	ldr	lr, .L958+332
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	mov	r2, r4
	mov	r3, r5
	cfstrd	mvd9, [lr, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd0, mvd0
	b	.L866
.L959:
	.align	2
.L958:
	.word	U1
	.word	T
	.word	OneAndHalf
	.word	S
	.word	.LC101
	.word	GDiv
	.word	GAddSub
	.word	.LC91
	.word	.LC137
	.word	N
	.word	MyZero
	.word	.LC226
	.word	.LC108
	.word	.LC109
	.word	.LC40
	.word	.LC228
	.word	.LC229
	.word	.LC230
	.word	.LC231
	.word	.LC232
	.word	.LC34
	.word	1062232653
	.word	-755914244
	.word	1072693248
	.word	.LC116
	.word	.LC105
	.word	.LC106
	.word	.LC66
	.word	.LC145
	.word	.LC146
	.word	.LC162
	.word	H
	.word	R
	.word	.LC147
	.word	.LC148
	.word	PseudoZero
	.word	.LC58
	.word	.LC87
	.word	.LC88
	.word	.LC89
	.word	.LC90
	.word	.LC104
	.word	.LC65
	.word	.LC139
	.word	E0
	.word	Underflow
	.word	.LC129
	.word	.LC67
	.word	.LC68
	.word	.LC69
	.word	.LC152
	.word	.LC153
	.word	C
	.word	.LC154
	.word	.LC155
	.word	.LC143
	.word	.LC144
	.word	RDiv
	.word	.LC100
	.word	.LC70
	.word	.LC71
	.word	.LC72
	.word	.LC73
	.word	RMult
	.word	.LC95
	.word	.LC96
	.word	GMult
	.word	.LC97
	.word	.LC241
	.word	.LC242
	.word	UfThold
	.word	Y2
	.word	Y1
	.word	X1
	.word	FourD
	.word	Eight
	.word	X8
	.word	Break
	.word	Z1
	.word	RadixD2
	.word	U2
	.word	F9
	.word	W
	.word	Z
	.word	Z2
	.word	I
	.word	Y
	.word	D
	.word	Half
	.word	Q
	.word	X
	.word	ErrCnt
	.word	.LC184
	.word	.LC5
	.word	.LC3
	.word	.LC185
	.word	.LC149
	.word	.LC150
	.word	.LC171
	.word	RAddSub
	.word	RSqrt
	.word	One
	.word	StickyBit
	.word	Radix
	.word	Two
	.word	Nine
	.word	Zero
	.word	.LC249
	.word	.LC243
	.word	.LC244
	.word	Four
	.word	Three
	.word	Precision
	.word	TwentySeven
	.word	.LC246
	.word	IEEE
	.word	.LC11
	.word	.LC245
	.word	.LC247
	.word	.LC248
.L932:
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd9, mvd0
	bne	.L865
	ldr	ip, .L958+424
	ldr	lr, .L958+336
	ldr	r8, .L958+284
	ldmia	r9, {r6-r7}	@ double
	ldmia	sl, {r0-r1}	@ double
	mov	r3, r7
	stmia	r4, {r6-r7}	@ double
	ldmia	ip, {r4-r5}	@ double
	mov	r2, r6
	stmia	fp, {r4-r5}	@ double
	stmia	r8, {r6-r7}	@ double
	stmia	lr, {r4-r5}	@ double
	bl	__aeabi_dsub
	ldr	r3, .L958+440
	ldr	r2, .L958+296
	cfldrd	mvd0, [r3, #0]
	ldr	r3, .L958+312
	cfmuld	mvd0, mvd0, mvd10
	stmia	r3, {r0-r1}	@ double
	cfstrd	mvd0, [r2, #0]
	ldr	sl, .L958+356
	ldr	r9, .L958+288
	ldr	r7, .L958+292
	ldr	fp, .L958+352
.L415:
	ldr	r3, .L958+336
	cfldrd	mvd1, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bvc	.L408
	ldr	r2, .L958+412
	ldr	r6, .L958+424
	ldmia	r2, {r3-r4}	@ double
	ldr	r2, .L958+344
	stmia	sl, {r3-r4}	@ double
	ldmia	r2, {r3-r4}	@ double
	stmia	r9, {r3-r4}	@ double
.L410:
	cfldrd	mvd8, [r9, #0]
	ldmia	sl, {r4-r5}	@ double
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldmia	fp, {r0-r1}	@ double
	bl	__aeabi_dsub
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd0, mvd8, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	bic	r2, r1, #-2147483648
	stmia	r7, {r0, r2}	@ phole stm
	cfldrd	mvd1, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfstrd	mvd8, [sl, #0]
	mov	r0, r0	@ nop
	cfstrd	mvd1, [r9, #0]
	bgt	.L410
	mov	r0, r0	@ nop
	ldr	r3, .L958+404
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd8, mvd0
	bgt	.L408
	ldr	r2, .L958+336
	ldmia	r8, {r3-r4}	@ double
	ldr	r1, .L958+344
	stmia	r2, {r3-r4}	@ double
	ldmia	r1, {r3-r4}	@ double
	ldr	r2, .L958+332
	stmia	r2, {r3-r4}	@ double
.L408:
	ldr	ip, .L958+416
	ldr	r4, .L958+344
	ldmia	ip, {r2-r3}	@ double
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_dadd
	ldr	r6, .L958+360
	stmia	r4, {r0-r1}	@ double
	ldr	r1, .L958+300
	ldmia	r1, {r2-r3}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dadd
	ldmia	r8, {r2-r3}	@ double
	mov	r4, r0
	mov	r5, r1
	stmia	r6, {r4-r5}	@ double
	bl	__aeabi_dadd
	ldr	r3, .L958+296
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd1
	stmia	r8, {r0-r1}	@ double
	beq	.+12
	bvs	.+8
	b	.L413
	mov	r0, r0	@ nop
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	bl	__aeabi_dsub
	stmia	r8, {r0-r1}	@ double
.L413:
	ldr	r3, .L958+344
	ldr	r2, .L958+348
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	beq	.+12
	bvs	.+8
	b	.L415
	ldr	r6, .L958+296
	ldr	r1, .L958+336
	ldr	r7, .L958+332
	ldmia	r1, {r2-r3}	@ double
	ldmia	r6, {r0-r1}	@ double
	bl	__aeabi_dsub
	cfldrd	mvd0, [r7, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd0, mvd0
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	mov	r4, r0
	mov	r5, r1
	bl	__aeabi_dadd
	ldmia	r6, {r2-r3}	@ double
	bl	__aeabi_ddiv
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldr	ip, .L958+356
	ldr	r1, .L958+300
	cfstrd	mvd8, [ip, #0]
	ldmia	r1, {r2-r3}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ddiv
	ldr	r3, .L958+304
	stmia	r3, {r0-r1}	@ double
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bne	.L865
	ldr	r2, .L958+308
	mov	r3, #0
	ldr	r4, .L958+312
	ldr	r6, .L958+360
	ldr	r8, .L958+412
	ldr	sl, .L958+404
	ldr	r9, .L958+424
	mov	r5, r7
	str	r3, [r2, #0]
	mov	r7, r2
.L422:
	cfldrd	mvd10, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd9, [r5, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd8, [r8, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd9, mvd10, mvd9
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_ddiv
	bl	floor
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfmuld	mvd8, mvd8, mvd0
	cfmvrdl	r2, mvd8
	cfmvrdh	r3, mvd8
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dsub
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfcmpd	r15, mvd1, mvd0
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfmvrdl	r0, mvd10
	cfmvrdh	r1, mvd10
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	cfstrd	mvd1, [r6, #0]
	bne	.L842
	ldr	r3, .L958+308
	mov	r2, #1
	str	r2, [r3, #0]
.L421:
	ldr	r4, .L958+312
	ldr	r3, .L958+316
	cfldrd	mvd1, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bvc	.L426
	mov	r0, r0	@ nop
	ldr	ip, .L958+412
	cfmvrdl	r0, mvd1
	cfmvrdh	r1, mvd1
	ldmia	ip, {r2-r3}	@ double
	bl	__aeabi_dsub
	stmia	r4, {r0-r1}	@ double
.L426:
	ldr	r4, .L958+320
	ldr	r5, .L958+324
.L843:
	ldr	r7, .L958+348
	bl	NewD
	cfldrd	mvd9, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r4, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd1, [r5, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd9, mvd0
	cfcmpd	r15, mvd0, mvd1
	beq	.+12
	bvs	.+8
	b	.L843
	ldr	r3, .L958+412
	ldr	sl, .L958+328
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd9, mvd0
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	sl, {r0-r1}	@ double
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bne	.L865
	ldr	r8, .L958+332
	ldr	r6, .L958+336
	ldr	fp, .L958+404
	ldr	r9, .L958+340
	mov	ip, #0
	ldmia	r8, {r2-r3}	@ double
	ldmia	fp, {r0-r1}	@ double
	str	ip, [r9, #0]
	cfstrd	mvd9, [r6, #0]
	bl	__aeabi_dadd
	ldr	ip, .L958+352
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd1, [ip, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd0, mvd1
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dadd
	ldmia	r8, {r2-r3}	@ double
	ldr	fp, .L958+344
	ldr	r4, .L958+404
	stmia	fp, {r0-r1}	@ double
	cfmvrdl	r0, mvd9
	cfmvrdh	r1, mvd9
	bl	__aeabi_dadd
	ldr	lr, .L958+356
	ldr	r7, .L958+348
	ldmia	lr, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldr	r2, .L958+360
	stmia	r2, {r0-r1}	@ double
	bl	SR3750
	ldmia	r8, {r2-r3}	@ double
	ldmia	r4, {r0-r1}	@ double
	ldmia	r7, {r4-r5}	@ double
	bl	__aeabi_dsub
	ldr	ip, .L958+352
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd1, [ip, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd0, mvd1
	cfmvrdl	r0, mvd0
	cfmvrdh	r1, mvd0
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	ldmia	r8, {r2-r3}	@ double
	stmia	fp, {r0-r1}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	ldr	lr, .L958+356
	mov	r4, r0
	ldmia	lr, {r2-r3}	@ double
	mov	r5, r1
	bl	__aeabi_dadd
	mov	r3, r1
	mov	r2, r0
	mov	r1, r5
	mov	r0, r4
	bl	__aeabi_dadd
	ldr	r2, .L958+360
	stmia	r2, {r0-r1}	@ double
	bl	SR3750
	bl	NewD
	ldmia	r6, {r6-r7}	@ double
	ldr	r3, .L958+348
	mov	r2, r6
	ldmia	r3, {r0-r1}	@ double
	mov	r3, r7
	bl	__aeabi_dsub
	mov	r2, r6
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	sl, {r0-r1}	@ double
	mov	r3, r7
	bl	__aeabi_dsub
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfcmpd	r15, mvd8, mvd0
	bne	.L865
	ldr	r4, .L958+404
	ldmia	r8, {r2-r3}	@ double
	ldmia	r4, {r0-r1}	@ double
	bl	__aeabi_dsub
	ldr	r5, .L958+352
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd1, [r5, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd0, mvd1
	cfmvrdl	r2, mvd0
	cfmvrdh	r3, mvd0
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	ldmia	r8, {r2-r3}	@ double
	stmia	fp, {r0-r1}	@ double
	mov	r0, r6
	ldr	r6, .L958+356
	mov	r1, r7
	bl	__aeabi_dsub
	ldmia	r6, {r2-r3}	@ double
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	cfmvrdl	r0, mvd8
	cfmvrdh	r1, mvd8
	bl	__aeabi_dadd
	ldr	r7, .L958+360
	stmia	r7, {r0-r1}	@ double
	bl	SR3750
	ldmia	r4, {r0-r1}	@ double
	ldmia	r8, {r2-r3}	@ double
	bl	__aeabi_dadd
	ldmia	r6, {r3-r4}	@ double
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd1, [r5, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd0, mvd0, mvd1
	stmia	r7, {r3-r4}	@ double
	cfstrd	mvd0, [fp, #0]
	bl	SR3750
	ldr	r3, [r9, #0]
	cmp	r3, #0
	bne	.L432
	b	.L865
.L529:
	ldr	ip, .L958+364
	ldr	r2, .L958+368
	ldr	r3, [ip, #8]
	ldr	r1, .L958+372
	add	r3, r3, #1
	str	r3, [ip, #8]
	ldr	r0, .L958+376
	bl	printf
	ldmia	r6, {r2-r3}	@ double
	ldr	r0, .L958+380
	bl	printf
	b	.L525
.L852:
	ldr	r0, .L958+384
	bl	printf
	ldr	r0, .L958+388
	bl	puts
	b	.L490
.L937:
	ldr	r0, .L958+392
	bl	puts
	b	.L518
.L842:
	bl	__aeabi_dsub
	ldr	r3, [r7, #0]
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cmp	r3, #0
	stmia	r4, {r0-r1}	@ double
	bne	.L421
	mov	r0, r0	@ nop
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r9, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd1, mvd0
	bgt	.L422
	b	.L865
.L940:
	ldr	r3, .L958+396
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L617
	ldr	r3, .L958+400
	ldr	r2, [r3, #0]
	cmp	r2, #1
	bne	.L617
	ldr	r8, .L958+404
	ldr	r3, .L958+408
	cfldrd	mvd9, [r8, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r3, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd9
	beq	.+12
	bvs	.+8
	b	.L619
	ldr	r6, .L958+412
	ldr	r7, .L958+416
	ldmia	r6, {r4-r5}	@ double
	ldmia	r7, {r2-r3}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	ldr	ip, .L958+420
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	ldmia	ip, {r2-r3}	@ double
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	cfmvrdl	r2, mvd9
	cfmvrdh	r3, mvd9
	bl	__aeabi_dsub
	ldr	sl, .L958+424
	cfmvdlr	mvd1, r0
	cfmvdhr	mvd1, r1
	cfldrd	mvd0, [sl, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd8, mvd1
	cfcmpd	r15, mvd8, mvd0
	beq	.L941
.L619:
	ldr	r0, .L958+428
	bl	puts
	b	.L616
.L941:
	ldr	r0, .L958+432
	bl	printf
	ldr	r0, .L958+436
	bl	printf
	cfldrd	mvd2, [r7, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r6, #0]
	mov	r0, r0	@ nop
	cfcmpd	r15, mvd0, mvd2
	bne	.L622
	ldr	r3, .L958+440
	ldr	r2, .L958+444
	cfldrd	mvd1, [r3, #0]
	mov	r0, r0	@ nop
	cfldrd	mvd0, [r2, #0]
	ldr	r3, .L958+448
	cfmuld	mvd1, mvd1, mvd0
	ldr	r2, .L958+452
	cfmuld	mvd1, mvd2, mvd1
	ldmia	r3, {r4-r5}	@ double
	ldmia	r2, {r6-r7}	@ double
	mov	r0, r4
	cfmvrdl	r2, mvd1
	cfmvrdh	r3, mvd1
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r6
	cfmvdlr	mvd8, r0
	cfmvdhr	mvd8, r1
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r6
	mov	r3, r7
	bl	__aeabi_dsub
	ldmia	r8, {r2-r3}	@ double
	bl	__aeabi_dadd
	cfmvdlr	mvd0, r0
	cfmvdhr	mvd0, r1
	cfldrd	mvd1, [sl, #0]
	mov	r0, r0	@ nop
	cfmuld	mvd8, mvd8, mvd0
	cfcmpd	r15, mvd8, mvd1
	beq	.L942
.L622:
	ldr	r0, .L958+456
	bl	printf
.L625:
	ldr	r3, .L958+460
	ldr	r2, [r3, #0]
	cmp	r2, #0
	beq	.L626
	ldr	r0, .L958+464
	bl	puts
	b	.L619
.L942:
	ldr	r0, .L958+468
	bl	printf
	b	.L625
.L626:
	ldr	r0, .L958+472
	bl	printf
	ldr	r0, .L958+476
	bl	puts
	b	.L619
	.size	main, .-main
	.section	.rodata.str1.4
	.align	2
.LC252:
	.ascii	"\012* * * FLOATING-POINT ERROR %d * * *\012\000"
	.text
	.align	2
	.global	sigfpe
	.type	sigfpe, %function
sigfpe:
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	ldr	r2, .L963
	mov	r1, r0
	ldr	r3, [r2, #0]
	stmfd	sp!, {r4, lr}
	add	r3, r3, #1
	str	r3, [r2, #0]
	ldr	r0, .L963+4
	bl	printf
	ldr	r3, .L963+8
	ldr	r4, .L963+12
	ldr	r0, [r3, #0]
	bl	fflush
	ldr	r1, [r4, #0]
	cmp	r1, #0
	beq	.L961
	mov	r0, #8
	bl	signal
	mov	r3, #0
	ldr	r0, .L963+16
	mov	r1, #1
	str	r3, [r4, #0]
	bl	longjmp
.L961:
	mov	r0, #1
	bl	exit
.L964:
	.align	2
.L963:
	.word	fpecount
	.word	.LC252
	.word	stdout
	.word	sigsave
	.word	ovfl_buf
	.size	sigfpe, .-sigfpe
	.global	Zero
	.bss
	.align	3
	.type	Zero, %object
	.size	Zero, 8
Zero:
	.space	8
	.global	Half
	.data
	.align	3
	.type	Half, %object
	.size	Half, 8
Half:
	.word	0
	.word	1071644672
	.global	One
	.align	3
	.type	One, %object
	.size	One, 8
One:
	.word	0
	.word	1072693248
	.global	Two
	.align	3
	.type	Two, %object
	.size	Two, 8
Two:
	.word	0
	.word	1073741824
	.global	Three
	.align	3
	.type	Three, %object
	.size	Three, 8
Three:
	.word	0
	.word	1074266112
	.global	Four
	.align	3
	.type	Four, %object
	.size	Four, 8
Four:
	.word	0
	.word	1074790400
	.global	Five
	.align	3
	.type	Five, %object
	.size	Five, 8
Five:
	.word	0
	.word	1075052544
	.global	Eight
	.align	3
	.type	Eight, %object
	.size	Eight, 8
Eight:
	.word	0
	.word	1075838976
	.global	Nine
	.align	3
	.type	Nine, %object
	.size	Nine, 8
Nine:
	.word	0
	.word	1075970048
	.global	TwentySeven
	.align	3
	.type	TwentySeven, %object
	.size	TwentySeven, 8
TwentySeven:
	.word	0
	.word	1077608448
	.global	ThirtyTwo
	.align	3
	.type	ThirtyTwo, %object
	.size	ThirtyTwo, 8
ThirtyTwo:
	.word	0
	.word	1077936128
	.global	TwoForty
	.align	3
	.type	TwoForty, %object
	.size	TwoForty, 8
TwoForty:
	.word	0
	.word	1080950784
	.global	MinusOne
	.align	3
	.type	MinusOne, %object
	.size	MinusOne, 8
MinusOne:
	.word	0
	.word	-1074790400
	.global	OneAndHalf
	.align	3
	.type	OneAndHalf, %object
	.size	OneAndHalf, 8
OneAndHalf:
	.word	0
	.word	1073217536
	.global	NoTrials
	.align	2
	.type	NoTrials, %object
	.size	NoTrials, 4
NoTrials:
	.word	20
	.section	.rodata.str1.4
	.align	2
.LC253:
	.ascii	"The program attempts to discriminate among\000"
	.align	2
.LC254:
	.ascii	"   FLAWs, like lack of a sticky bit,\000"
	.align	2
.LC255:
	.ascii	"   Serious DEFECTs, like lack of a guard digit, and"
	.ascii	"\000"
	.align	2
.LC256:
	.ascii	"   FAILUREs, like 2+2 == 5 .\000"
	.align	2
.LC257:
	.ascii	"Failures may confound subsequent diagnoses.\012\000"
	.align	2
.LC258:
	.ascii	"The diagnostic capabilities of this program go beyo"
	.ascii	"nd an earlier\000"
	.align	2
.LC259:
	.ascii	"program called `MACHAR', which can be found at the "
	.ascii	"end of the\000"
	.align	2
.LC260:
	.ascii	"book  `Software Manual for the Elementary Functions"
	.ascii	"' (1980) by\000"
	.align	2
.LC261:
	.ascii	"W. J. Cody and W. Waite. Although both programs try"
	.ascii	" to discover\000"
	.align	2
.LC262:
	.ascii	"the Radix, Precision and range (over/underflow thre"
	.ascii	"sholds)\000"
	.align	2
.LC263:
	.ascii	"of the arithmetic, this program tries to cope with "
	.ascii	"a wider variety\000"
	.align	2
.LC264:
	.ascii	"of pathologies, and to say how well the arithmetic "
	.ascii	"is implemented.\000"
	.align	2
.LC265:
	.ascii	"\012The program is based upon a conventional radix "
	.ascii	"representation for\000"
	.align	2
.LC266:
	.ascii	"floating-point numbers, but also allows logarithmic"
	.ascii	" encoding\000"
	.align	2
.LC267:
	.ascii	"as used by certain early WANG machines.\012\000"
	.align	2
.LC268:
	.ascii	"BASIC version of this program (C) 1983 by Prof. W. "
	.ascii	"M. Kahan;\000"
	.align	2
.LC269:
	.ascii	"see source comments for more history.\000"
	.data
	.align	2
	.type	hist.4624, %object
	.size	hist.4624, 72
hist.4624:
	.word	.LC253
	.word	.LC254
	.word	.LC255
	.word	.LC256
	.word	.LC257
	.word	.LC258
	.word	.LC259
	.word	.LC260
	.word	.LC261
	.word	.LC262
	.word	.LC263
	.word	.LC264
	.word	.LC265
	.word	.LC266
	.word	.LC267
	.word	.LC268
	.word	.LC269
	.word	0
	.section	.rodata.str1.4
	.align	2
.LC270:
	.ascii	"Running this program should reveal these characteri"
	.ascii	"stics:\000"
	.align	2
.LC271:
	.ascii	"     Radix = 1, 2, 4, 8, 10, 16, 100, 256 ...\000"
	.align	2
.LC272:
	.ascii	"     Precision = number of significant digits carri"
	.ascii	"ed.\000"
	.align	2
.LC273:
	.ascii	"     U2 = Radix/Radix^Precision = One Ulp\000"
	.align	2
.LC274:
	.ascii	"\011(OneUlpnit in the Last Place) of 1.000xxx .\000"
	.align	2
.LC275:
	.ascii	"     U1 = 1/Radix^Precision = One Ulp of numbers a "
	.ascii	"little less than 1.0 .\000"
	.align	2
.LC276:
	.ascii	"     Adequacy of guard digits for Mult., Div. and S"
	.ascii	"ubt.\000"
	.align	2
.LC277:
	.ascii	"     Whether arithmetic is chopped, correctly round"
	.ascii	"ed, or something else\000"
	.align	2
.LC278:
	.ascii	"\011for Mult., Div., Add/Subt. and Sqrt.\000"
	.align	2
.LC279:
	.ascii	"     Whether a Sticky Bit used correctly for roundi"
	.ascii	"ng.\000"
	.align	2
.LC280:
	.ascii	"     UnderflowThreshold = an underflow threshold.\000"
	.align	2
.LC281:
	.ascii	"     E0 and PseudoZero tell whether underflow is ab"
	.ascii	"rupt, gradual, or fuzzy.\000"
	.align	2
.LC282:
	.ascii	"     V = an overflow threshold, roughly.\000"
	.align	2
.LC283:
	.ascii	"     V0  tells, roughly, whether  Infinity  is repr"
	.ascii	"esented.\000"
	.align	2
.LC284:
	.ascii	"     Comparisions are checked for consistency with "
	.ascii	"subtraction\000"
	.align	2
.LC285:
	.ascii	"\011and for contamination with pseudo-zeros.\000"
	.align	2
.LC286:
	.ascii	"     Sqrt is tested.  Y^X is not tested.\000"
	.align	2
.LC287:
	.ascii	"     Extra-precise subexpressions are revealed but "
	.ascii	"NOT YET tested.\000"
	.align	2
.LC288:
	.ascii	"     Decimal-Binary conversion is NOT YET tested fo"
	.ascii	"r accuracy.\000"
	.data
	.align	2
	.type	chars.4620, %object
	.size	chars.4620, 80
chars.4620:
	.word	.LC270
	.word	.LC271
	.word	.LC272
	.word	.LC273
	.word	.LC274
	.word	.LC275
	.word	.LC276
	.word	.LC277
	.word	.LC278
	.word	.LC279
	.word	.LC280
	.word	.LC281
	.word	.LC282
	.word	.LC283
	.word	.LC284
	.word	.LC285
	.word	.LC286
	.word	.LC287
	.word	.LC288
	.word	0
	.section	.rodata.str1.4
	.align	2
.LC289:
	.ascii	"Users are invited to help debug and augment this pr"
	.ascii	"ogram so it will\000"
	.align	2
.LC290:
	.ascii	"cope with unanticipated and newly uncovered arithme"
	.ascii	"tic pathologies.\012\000"
	.align	2
.LC291:
	.ascii	"Please send suggestions and interesting results to\000"
	.align	2
.LC292:
	.ascii	"\011Richard Karpinski\000"
	.align	2
.LC293:
	.ascii	"\011Computer Center U-76\000"
	.align	2
.LC294:
	.ascii	"\011University of California\000"
	.align	2
.LC295:
	.ascii	"\011San Francisco, CA 94143-0704, USA\012\000"
	.align	2
.LC296:
	.ascii	"In doing so, please include the following informati"
	.ascii	"on:\000"
	.align	2
.LC297:
	.ascii	"\011Precision:\011double;\000"
	.align	2
.LC298:
	.ascii	"\011Version:\01110 February 1989;\000"
	.align	2
.LC299:
	.ascii	"\011Computer:\012\000"
	.align	2
.LC300:
	.ascii	"\011Compiler:\012\000"
	.align	2
.LC301:
	.ascii	"\011Optimization level:\012\000"
	.align	2
.LC302:
	.ascii	"\011Other relevant compiler options:\000"
	.data
	.align	2
	.type	head.4616, %object
	.size	head.4616, 60
head.4616:
	.word	.LC289
	.word	.LC290
	.word	.LC291
	.word	.LC292
	.word	.LC293
	.word	.LC294
	.word	.LC295
	.word	.LC296
	.word	.LC297
	.word	.LC298
	.word	.LC299
	.word	.LC300
	.word	.LC301
	.word	.LC302
	.word	0
	.section	.rodata.str1.4
	.align	2
.LC303:
	.ascii	"Lest this program stop prematurely, i.e. before dis"
	.ascii	"playing\012\000"
	.align	2
.LC304:
	.ascii	"    `END OF TEST',\012\000"
	.align	2
.LC305:
	.ascii	"try to persuade the computer NOT to terminate execu"
	.ascii	"tion when an\000"
	.align	2
.LC306:
	.ascii	"error like Over/Underflow or Division by Zero occur"
	.ascii	"s, but rather\000"
	.align	2
.LC307:
	.ascii	"to persevere with a surrogate value after, perhaps,"
	.ascii	" displaying some\000"
	.align	2
.LC308:
	.ascii	"warning.  If persuasion avails naught, don't despai"
	.ascii	"r but run this\000"
	.align	2
.LC309:
	.ascii	"program anyway to see how many milestones it passes"
	.ascii	", and then\000"
	.align	2
.LC310:
	.ascii	"amend it to make further progress.\012\000"
	.align	2
.LC311:
	.ascii	"Answer questions with Y, y, N or n (unless otherwis"
	.ascii	"e indicated).\012\000"
	.data
	.align	2
	.type	instr.4612, %object
	.size	instr.4612, 40
instr.4612:
	.word	.LC303
	.word	.LC304
	.word	.LC305
	.word	.LC306
	.word	.LC307
	.word	.LC308
	.word	.LC309
	.word	.LC310
	.word	.LC311
	.word	0
	.section	.rodata
	.align	2
	.type	msg.4415, %object
	.size	msg.4415, 16
msg.4415:
	.word	.LC65
	.word	.LC58
	.word	.LC5
	.word	.LC108
	.comm	ovfl_buf,392,8
	.comm	sigsave,4,4
	.comm	Radix,8,8
	.comm	BInvrse,8,8
	.comm	RadixD2,8,8
	.comm	BMinusU2,8,8
	.comm	Indx,4,4
	.comm	ch,8,1
	.comm	AInvrse,8,8
	.comm	A1,8,8
	.comm	C,8,8
	.comm	CInvrse,8,8
	.comm	D,8,8
	.comm	FourD,8,8
	.comm	E0,8,8
	.comm	E1,8,8
	.comm	Exp2,8,8
	.comm	E3,8,8
	.comm	MinSqEr,8,8
	.comm	SqEr,8,8
	.comm	MaxSqEr,8,8
	.comm	E9,8,8
	.comm	Third,8,8
	.comm	F6,8,8
	.comm	F9,8,8
	.comm	H,8,8
	.comm	HInvrse,8,8
	.comm	I,4,4
	.comm	StickyBit,8,8
	.comm	J,8,8
	.comm	MyZero,8,8
	.comm	Precision,8,8
	.comm	Q,8,8
	.comm	Q9,8,8
	.comm	R,8,8
	.comm	Random9,8,8
	.comm	T,8,8
	.comm	Underflow,8,8
	.comm	S,8,8
	.comm	OneUlp,8,8
	.comm	UfThold,8,8
	.comm	U1,8,8
	.comm	U2,8,8
	.comm	V,8,8
	.comm	V0,8,8
	.comm	V9,8,8
	.comm	W,8,8
	.comm	X,8,8
	.comm	X1,8,8
	.comm	X2,8,8
	.comm	X8,8,8
	.comm	Random1,8,8
	.comm	Y,8,8
	.comm	Y1,8,8
	.comm	Y2,8,8
	.comm	Random2,8,8
	.comm	Z,8,8
	.comm	PseudoZero,8,8
	.comm	Z1,8,8
	.comm	Z2,8,8
	.comm	Z9,8,8
	.comm	ErrCnt,16,4
	.comm	fpecount,4,4
	.comm	Milestone,4,4
	.comm	PageNo,4,4
	.comm	M,4,4
	.comm	N,4,4
	.comm	N1,4,4
	.comm	GMult,4,4
	.comm	GDiv,4,4
	.comm	GAddSub,4,4
	.comm	RMult,4,4
	.comm	RDiv,4,4
	.comm	RAddSub,4,4
	.comm	RSqrt,4,4
	.comm	Break,4,4
	.comm	Done,4,4
	.comm	NotMonot,4,4
	.comm	Monot,4,4
	.comm	Anomaly,4,4
	.comm	IEEE,4,4
	.comm	SqRWrng,4,4
	.comm	UfNGrad,4,4
	.ident	"GCC: (GNU) 4.3.2"
	.section	.note.GNU-stack,"",%progbits