.cpu ep9312 .fpu maverick .eabi_attribute 20, 1 .eabi_attribute 21, 1 .eabi_attribute 23, 3 .eabi_attribute 24, 1 .eabi_attribute 25, 1 .eabi_attribute 26, 2 .eabi_attribute 30, 6 .eabi_attribute 18, 4 .file "rbug.c" .global __aeabi_lcmp .text .align 2 .global d .type d, %function d: @ Function supports interworking. @ args = 0, pretend = 0, frame = 24 @ frame_needed = 1, uses_anonymous_args = 0 mov ip, sp stmfd sp!, {r4, fp, ip, lr, pc} sub fp, ip, #4 sub sp, sp, #28 str r0, [fp, #-36] str r1, [fp, #-32] sub r0, fp, #36 ldmia r0, {r0-r1} mov r2, #0 mov r3, #0 bl __aeabi_lcmp mov r3, r0 cmp r3, #0 blt .L3 mov r0, r0 @ nop mov r0, r0 @ nop cfldr64 mvdx0, [fp, #-36] mov r0, r0 @ nop cfcvt64d mvd0, mvdx0 cfstrd mvd0, [fp, #-44] b .L2 .L3: sub r1, fp, #36 ldmia r1, {r1-r2} mov r3, #1 mov r4, #0 and r3, r3, r1 and r4, r4, r2 sub r1, fp, #36 ldmia r1, {r1-r2} movs r2, r2, lsr #1 mov r1, r1, rrx orr r3, r3, r1 orr r4, r4, r2 cfmv64lr mvdx0, r3 cfmv64hr mvdx0, r4 cfcvt64d mvd0, mvdx0 cfstrd mvd0, [fp, #-44] mov r0, r0 @ nop cfldrd mvd1, [fp, #-44] mov r0, r0 @ nop cfldrd mvd0, [fp, #-44] mov r0, r0 @ nop cfaddd mvd1, mvd1, mvd0 cfstrd mvd1, [fp, #-44] .L2: sub r3, fp, #44 ldmia r3, {r3-r4} str r3, [fp, #-28] str r4, [fp, #-24] sub r3, fp, #28 ldmia r3, {r3-r4} mov r0, r3 mov r1, r4 sub sp, fp, #16 ldmfd sp, {r4, fp, sp, lr} bx lr .size d, .-d .align 2 .global s .type s, %function s: @ Function supports interworking. @ args = 0, pretend = 0, frame = 24 @ frame_needed = 1, uses_anonymous_args = 0 mov ip, sp stmfd sp!, {r4, fp, ip, lr, pc} sub fp, ip, #4 sub sp, sp, #28 str r0, [fp, #-36] str r1, [fp, #-32] sub r0, fp, #36 ldmia r0, {r0-r1} mov r2, #0 mov r3, #0 bl __aeabi_lcmp mov r3, r0 cmp r3, #0 blt .L7 mov r0, r0 @ nop mov r0, r0 @ nop cfldr64 mvdx0, [fp, #-36] mov r0, r0 @ nop cfcvt64s mvf0, mvdx0 cfstrs mvf0, [fp, #-40] b .L6 .L7: sub r1, fp, #36 ldmia r1, {r1-r2} mov r3, #1 mov r4, #0 and r3, r3, r1 and r4, r4, r2 sub r1, fp, #36 ldmia r1, {r1-r2} movs r2, r2, lsr #1 mov r1, r1, rrx orr r3, r3, r1 orr r4, r4, r2 cfmv64lr mvdx0, r3 cfmv64hr mvdx0, r4 cfcvt64s mvf0, mvdx0 cfstrs mvf0, [fp, #-40] cfldrs mvf1, [fp, #-40] cfldrs mvf0, [fp, #-40] cfadds mvf1, mvf1, mvf0 cfstrs mvf1, [fp, #-40] .L6: cfldrs mvf1, [fp, #-40] cfstrs mvf1, [fp, #-24] ldr r3, [fp, #-24] @ float mov r0, r3 @ float sub sp, fp, #16 ldmfd sp, {r4, fp, sp, lr} bx lr .size s, .-s .global __aeabi_d2ulz .section .rodata .align 2 .LC0: .ascii "0x%016llx\012\000" .text .align 2 .global main .type main, %function main: @ Function supports interworking. @ args = 0, pretend = 0, frame = 16 @ frame_needed = 1, uses_anonymous_args = 0 mov ip, sp stmfd sp!, {r4, fp, ip, lr, pc} sub fp, ip, #4 sub sp, sp, #20 adr r3, .L19 ldmia r3, {r3-r4} str r3, [fp, #-36] str r4, [fp, #-32] sub r0, fp, #36 ldmia r0, {r0-r1} bl d mov r3, r0 mov r4, r1 str r3, [fp, #-28] str r4, [fp, #-24] sub r0, fp, #28 ldmia r0, {r0-r1} bl __aeabi_d2ulz mov r3, r0 mov r4, r1 str r3, [fp, #-36] str r4, [fp, #-32] ldr r2, [fp, #-36] ldr r3, .L19+16 cmp r2, r3 bne .L15 ldr r2, [fp, #-32] ldr r3, .L19+20 cmp r2, r3 beq .L17 .L15: bl abort .L17: adr r3, .L19+8 ldmia r3, {r3-r4} str r3, [fp, #-36] str r4, [fp, #-32] sub r0, fp, #36 ldmia r0, {r0-r1} bl s cfmvsr mvf0, r0 cfcvtsd mvd0, mvf0 cfstrd mvd0, [fp, #-28] sub r0, fp, #28 ldmia r0, {r0-r1} bl __aeabi_d2ulz mov r3, r0 mov r4, r1 str r3, [fp, #-36] str r4, [fp, #-32] ldr r3, [fp, #-36] cmp r3, #0 bne .L16 ldr r2, [fp, #-32] ldr r3, .L19+24 cmp r2, r3 beq .L18 .L16: ldr r0, .L19+28 sub r2, fp, #36 ldmia r2, {r2-r3} bl printf bl abort .L18: mov r0, #0 bl exit .L20: .align 3 .L19: .word 2099381249 .word -2037138835 .word 1 .word -2110500736 .word 2099382272 .word -2037138835 .word -2110500608 .word .LC0 .size main, .-main .ident "GCC: (GNU) 4.3.2" .section .note.GNU-stack,"",%progbits