/* time the save/load of the crunch registers as used in the linux kernel */

#define CRUNCH_MVDX0            0
#define CRUNCH_MVDX1            8
#define CRUNCH_MVDX2            16
#define CRUNCH_MVDX3            24
#define CRUNCH_MVDX4            32
#define CRUNCH_MVDX5            40
#define CRUNCH_MVDX6            48
#define CRUNCH_MVDX7            56
#define CRUNCH_MVDX8            64
#define CRUNCH_MVDX9            72
#define CRUNCH_MVDX10           80
#define CRUNCH_MVDX11           88
#define CRUNCH_MVDX12           96
#define CRUNCH_MVDX13           104
#define CRUNCH_MVDX14           112
#define CRUNCH_MVDX15           120
#define CRUNCH_MVAX0L           128
#define CRUNCH_MVAX0M           132
#define CRUNCH_MVAX0H           136
#define CRUNCH_MVAX1L           140
#define CRUNCH_MVAX1M           144
#define CRUNCH_MVAX1H           148
#define CRUNCH_MVAX2L           152
#define CRUNCH_MVAX2M           156
#define CRUNCH_MVAX2H           160
#define CRUNCH_MVAX3L           164
#define CRUNCH_MVAX3M           168
#define CRUNCH_MVAX3H           172
#define CRUNCH_DSPSC            176

#define ALIGN         .align 4,0x90

#define ENTRY(name) \
  .globl name; \
  ALIGN; \
  name:

.text

/*
 * Save/load crunch registers.
 *
 * r1 = where to save to
 * r0 = where to load from
 */
ENTRY(crunch_save_load)
crunch_save:
        cfstr64         mvdx0, [r1, #CRUNCH_MVDX0]      @ save 64b registers
        cfstr64         mvdx1, [r1, #CRUNCH_MVDX1]
        cfstr64         mvdx2, [r1, #CRUNCH_MVDX2]
        cfstr64         mvdx3, [r1, #CRUNCH_MVDX3]
        cfstr64         mvdx4, [r1, #CRUNCH_MVDX4]
        cfstr64         mvdx5, [r1, #CRUNCH_MVDX5]
        cfstr64         mvdx6, [r1, #CRUNCH_MVDX6]
        cfstr64         mvdx7, [r1, #CRUNCH_MVDX7]
        cfstr64         mvdx8, [r1, #CRUNCH_MVDX8]
        cfstr64         mvdx9, [r1, #CRUNCH_MVDX9]
        cfstr64         mvdx10, [r1, #CRUNCH_MVDX10]
        cfstr64         mvdx11, [r1, #CRUNCH_MVDX11]
        cfstr64         mvdx12, [r1, #CRUNCH_MVDX12]
        cfstr64         mvdx13, [r1, #CRUNCH_MVDX13]
        cfstr64         mvdx14, [r1, #CRUNCH_MVDX14]
        cfstr64         mvdx15, [r1, #CRUNCH_MVDX15]

        cfmv32al        mvfx0, mvax0                    @ save 72b accumulators
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX0L]
        cfmv32am        mvfx0, mvax0
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX0M]
        cfmv32ah        mvfx0, mvax0
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX0H]
        cfmv32al        mvfx0, mvax1
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX1L]
        cfmv32am        mvfx0, mvax1
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX1M]
        cfmv32ah        mvfx0, mvax1
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX1H]
        cfmv32al        mvfx0, mvax2
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX2L]
        cfmv32am        mvfx0, mvax2
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX2M]
        cfmv32ah        mvfx0, mvax2
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX2H]
        cfmv32al        mvfx0, mvax3
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX3L]
        cfmv32am        mvfx0, mvax3
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX3M]
        cfmv32ah        mvfx0, mvax3
        cfstr32         mvfx0, [r1, #CRUNCH_MVAX3H]

        cfmv32sc        mvdx0, dspsc                    @ save status word
        cfstr64         mvdx0, [r1, #CRUNCH_DSPSC]

@        teq             r0, #0                          @ anything to load?
@        cfldr64eq       mvdx0, [r1, #CRUNCH_MVDX0]      @ mvdx0 was clobbered
@        moveq           pc, lr

crunch_load:
        cfldr64         mvdx0, [r0, #CRUNCH_DSPSC]      @ load status word
        cfmvsc32        dspsc, mvdx0

        cfldr32         mvfx0, [r0, #CRUNCH_MVAX0L]     @ load 72b accumulators
        cfmval32        mvax0, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX0M]
        cfmvam32        mvax0, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX0H]
        cfmvah32        mvax0, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX1L]
        cfmval32        mvax1, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX1M]
        cfmvam32        mvax1, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX1H]
        cfmvah32        mvax1, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX2L]
        cfmval32        mvax2, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX2M]
        cfmvam32        mvax2, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX2H]
        cfmvah32        mvax2, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX3L]
        cfmval32        mvax3, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX3M]
        cfmvam32        mvax3, mvfx0
        cfldr32         mvfx0, [r0, #CRUNCH_MVAX3H]
        cfmvah32        mvax3, mvfx0

        cfldr64         mvdx0, [r0, #CRUNCH_MVDX0]      @ load 64b registers
        cfldr64         mvdx1, [r0, #CRUNCH_MVDX1]
        cfldr64         mvdx2, [r0, #CRUNCH_MVDX2]
        cfldr64         mvdx3, [r0, #CRUNCH_MVDX3]
        cfldr64         mvdx4, [r0, #CRUNCH_MVDX4]
        cfldr64         mvdx5, [r0, #CRUNCH_MVDX5]
        cfldr64         mvdx6, [r0, #CRUNCH_MVDX6]
        cfldr64         mvdx7, [r0, #CRUNCH_MVDX7]
        cfldr64         mvdx8, [r0, #CRUNCH_MVDX8]
        cfldr64         mvdx9, [r0, #CRUNCH_MVDX9]
        cfldr64         mvdx10, [r0, #CRUNCH_MVDX10]
        cfldr64         mvdx11, [r0, #CRUNCH_MVDX11]
        cfldr64         mvdx12, [r0, #CRUNCH_MVDX12]
        cfldr64         mvdx13, [r0, #CRUNCH_MVDX13]
        cfldr64         mvdx14, [r0, #CRUNCH_MVDX14]
        cfldr64         mvdx15, [r0, #CRUNCH_MVDX15]

        mov     pc, lr